Add NC-SI to the usual phy handling. This makes two notable changes:
- Somewhat similar to a fixed phy, phy_connect() will create an NC-SI
phy if CONFIG_PHY_NCSI is defined.
- An early return is added to phy_read() and phy_write() to handle a
case like the NC-SI phy which does not define a bus.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This introduces support for the NC-SI protocol, modelled as a phy driver
for other ethernet drivers to consume.
NC-SI (Network Controller Sideband Interface) is a protocol to manage a
sideband connection to a proper network interface, for example a BMC
(Baseboard Management Controller) sharing the NIC of the host system.
Probing and configuration occurs by communicating with the "remote" NIC
via NC-SI control frames (Ethernet header 0x88f8).
This implementation is roughly based on the upstream Linux
implementation[0], with a reduced feature set and an emphasis on getting
a link up as fast as possible rather than probing the full possible
topology of the bus.
The current phy model relies on the network being "up", sending NC-SI
command frames via net_send_packet() and receiving them from the
net_loop() loop (added in a following patch).
The ncsi-pkt.h header[1] is copied from the Linux kernel for consistent
field definitions.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add driver flag to skip power domain disabling on device removal.
Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com>
dm: core: Add a flag for power domain control on device removal
In various cases a power domain must stay enabled after device
removal when booting OS (i.e. serial debug console or display).
Add a flag to selectively skip switching off a power domain.
Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sat, 15 Feb 2020 13:10:02 +0000 (14:10 +0100)]
ARM: socfpga: Permit overriding the default timer frequency
The default timer rate may be different than 25 MHz, permit overriding
the default rate in board configuration file. Ultimatelly, this should
be properly handled by a clock driver, however that is not available
on Gen5 yet.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Marek Vasut [Sat, 15 Feb 2020 13:46:10 +0000 (14:46 +0100)]
rtc: m41t62: add compatible for m41st87
This adds a compatible string for m41st87. This ensures that this driver
can be used for m41st87.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
Seung-Woo Kim [Thu, 13 Feb 2020 08:24:11 +0000 (17:24 +0900)]
gadget: f_thor: add missing line breaks for pr_err()
After the commit 9b643e312d52 ("treewide: replace with error()
with pr_err()"), there are pr_err() usages without line break. Add
missing line breaks for pr_err() used in f_thor.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Andy Shevchenko [Wed, 29 Jan 2020 15:23:14 +0000 (17:23 +0200)]
dfu: Reset timeout in case of DFU request
In case dfu command is being executed with timeout option,
the timer may expire in the middle of DFU operation. If there
is DFU request coming, we may simple reset timeout value
to prevent aborting of ongoing DFU operation.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Ferry Toth <ftoth@exalondelft.nl>
Marek Vasut [Fri, 24 Jan 2020 00:31:37 +0000 (01:31 +0100)]
ARM: rmobile: Limit bootloader size to 1 MiB on R-Car Gen3
The HF/QSPI flash layout permits up to 1 MiB large bootloader blob,
set CONFIG_BOARD_SIZE_LIMIT to enforce this limit and set the
monitor size to match accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Sat, 29 Feb 2020 13:01:07 +0000 (08:01 -0500)]
Merge tag 'efi-2020-04-rc4-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-04-rc4 (2)
In Linux next-20200228 patches have been merged to load an initial ramdisk
using an EFI_LOAD_FILE2_PROTOCOL provided by the firmware. See commit ec93fc371f01 ("efi/libstub: Add support for loading the initrd from a
device path"). The idea behind it is that the firmware should be
responsible for validating the initrd in a secure boot setup.
This pull-request comprises a patch series which let's U-Boot provide an
initial implementation of the EFI_LOAD_FILE2_PROTOCOL providing the initrd.
Masahiro Yamada [Fri, 28 Feb 2020 12:57:21 +0000 (21:57 +0900)]
ARM: dts: uniphier: remove U-Boot own EEPROM compatible and property
The compatible string "i2c-eeprom" is U-Boot own compatible, which
has never been approved by the DT community. "u-boot,i2c-offset-len"
is also a U-Boot own hack.
Linux adds "atmel,*" as generic compatibles, and U-Boot also followed
it by commit d7e28918aa3f ("i2c_eeprom: Add reading support").
The U-Boot own hack is no longer needed. Just sync with Linux.
Ilias Apalodimas [Fri, 21 Feb 2020 07:55:45 +0000 (09:55 +0200)]
efi_loader: Implement FileLoad2 for initramfs loading
Following kernel's proposal for an arch-agnostic initrd loading
mechanism [1] let's implement the U-boot counterpart.
This new approach has a number of advantages compared to what we did up
to now. The file is loaded into memory only when requested limiting the
area of TOCTOU attacks. Users will be allowed to place the initramfs
file on any u-boot accessible partition instead of just the ESP one.
Finally this is an attempt of a generic interface across architectures
in the linux kernel so it makes sense to support that.
The file location is intentionally only supported as a config option
argument(CONFIG_EFI_INITRD_FILESPEC), in an effort to enhance security.
Although U-boot is not responsible for verifying the integrity of the
initramfs, we can enhance the offered security by only accepting a
built-in option, which will be naturally verified by UEFI Secure Boot.
This can easily change in the future if needed and configure that via ENV
or UEFI variable.
Christophe Leroy [Wed, 26 Feb 2020 16:17:52 +0000 (16:17 +0000)]
watchdog: Don't select CONFIG_WATCHDOG and CONFIG_HW_WATCHDOG at the same time
Commit 06985289d452 ("watchdog: Implement generic watchdog_reset()
version") introduced an automatic selection of CONFIG_WATCHDOG by
CONFIG_WDT. But for boards selecting CONFIG_HW_WATCHDOG, like
boards have a powerpc 8xx, CONFIG_WATCHDOG shall not be selected
as they are mutually exclusive.
Make CONFIG_WATCHDOG dependent on !CONFIG_HW_WATCHDOG
Fixes: 06985289d452 ("watchdog: Implement generic watchdog_reset() version") Cc: Stefan Roese <sr@denx.de> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Stefan Roese <sr@denx.de>
Christophe Leroy [Thu, 20 Feb 2020 07:39:51 +0000 (07:39 +0000)]
watchdog: mpc8xx: Revert the 8xx watchdog back to CONFIG_HW_WATCHDOG
Commit f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros
cleanup") switched the watchdog to CONFIG_WATCHDOG. But this is not
compatible with the 8xx because it starts the watchdog HW timer at
reset and must be serviced from the very beginning including while
U-boot is executed in the firmware before relocation in RAM.
Select CONFIG_HW_WATCHDOG and make hw_watchdog_reset() visible.
Meanwhile, finalise the cleanup of arch/powerpc/cpu/mpc8xx/Kconfig by
removing the lines put in comment in that commit, and also remove
again the selection of CONFIG_MPC8xx_WATCHDOG which was removed by
that commit and brought back by mistake by commit b3134ffbd944
("watchdog: Kconfig: Sort entry alphabetically")
Note that there was an 'imply WATCHDOG' in the original commit but
it disappeared in the Kconfig alphabetical sorting, so no need to
remove it here.
Michal Simek [Thu, 6 Feb 2020 13:36:46 +0000 (14:36 +0100)]
net: zynq: Free allocated buffers in case of error
Driver probe function is called again and again in case of error.
Malloc space is getting full which is is reported by:
Insufficient RAM for page table: 0x15000 > 0x14000.
Please increase the size in get_page_table_size()
### ERROR ### Please RESET the board ###
The patch is freeing allocated buffers on error path to avoid panic.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 6 Feb 2020 14:59:23 +0000 (15:59 +0100)]
net: phy: dp83867: Clean force link good bit
On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which
means FORCE_LINK_GOOD is already setup. Origin code was doing write but the
new code is doing read/modify/write and keep this bit untouched. That's why
ethernet stop to work.
The patch is cleaning this bit when PHYCR value is composed.
Tested on Xilinx zcu102-revA and zcu104-rev1.0 boards.
T Karthik Reddy [Mon, 20 Jan 2020 06:59:23 +0000 (23:59 -0700)]
mtd: nand: Fix on-die ecc issues in arasan_nfc driver
Fixed wrong enumeration of nand_config structure. Added chip select
function before reading the nand chip for maf/dev id's, without this
unable to access id's from some of the micron chips. Also added a
print statement to identify if a nand flash is using on-die ecc.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Thu, 16 Jan 2020 11:55:05 +0000 (03:55 -0800)]
versal: drivers: clk: Fix invalid clock name queries
The clock driver makes EEMI call to get the name of invalid clk
when executing versal_get_clock_info() function. This results in
error messages.
Added check for validating clock before saving clock attribute and
calling versal_pm_clock_get_name() in versal_get_clock_info() function.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Wed, 15 Jan 2020 09:15:13 +0000 (02:15 -0700)]
net: zynq_gem: Use ulong instead of u32 data type
flush_dcache_range() expects unsigned long in the arguments. Here u32
variable is unable to hold the higher address value when ddr mapped
to higher addresses & flushing lower address dchache range instead
which is unmapped causing to crash.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Fri, 14 Feb 2020 11:54:41 +0000 (20:54 +0900)]
ARM: uniphier: remove workaround for the NAND write protect
This workaround was previously needed for LD4, Pro4, sLD8, Pro5
SoCs. The boot ROM does not touch this register for PXs2/LD6b or
later.
Now that the reset signal of the Denali NAND controller is always
asserted in board_init() then deasserted in the driver, the
WRITE_PROTECT register gets back to the default value, which means
the write protect is deasserted.
Masahiro Yamada [Fri, 14 Feb 2020 11:54:40 +0000 (20:54 +0900)]
ARM: uniphier: move NAND reset assertion to U-Boot proper from SPL
The comment /* deassert reset */ is wrong. It asserts the reset.
It no longer needs to stay in SPL. The NAND controller reset is
handled in the driver. So, this assert can be moved to the
board_init() of U-Boot proper.
- sdscript: source boot.scr in the file system of the SD media
- sdboot : boot the kernel using the images in the file system
of the SD media
- sdscript: update the boot firmware in the SD media
(in raw block sectors)
Tom Rini [Wed, 26 Feb 2020 19:49:24 +0000 (14:49 -0500)]
Merge tag 'efi-2020-04-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-04-rc4
UEFI spec 2.8 errata A replaces the RuntimeServicesSupported variable
defined in UEFI spec 2.8 by the configuration table
EFI_RT_PROPERTIES_TABLE. So let's follow suit.
UEFI spec 2.8 errata A replaces the RuntimeServicesSupported variable
defined in UEFI spec 2.8 by the configuration table
EFI_RT_PROPERTIES_TABLE. So let's follow suit.
Madan Srinivas [Fri, 14 Feb 2020 14:05:24 +0000 (09:05 -0500)]
defconfig: k2x_hs: Remove DTB_RESELECT to fix DHCP issue
This fixes the inadvertent definition of CONFIG_DTB_RESELECT and
CONFIG_MULTI_DTB_FIT in the K2x HS defconfigs, that happened as part of
a resync of the defconfigs.
The inclusion of these config options causes ethernet to stop working on
K2x HS devices as they interfere with the installation of the secure
boot monitor.
This patch also removes the above configs for the K2 GP devices, as they
are not needed, and to keep the differences between the GP and HS
defconfigs to a minimum.
Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
Printing the error message in verbose mode fails, since python3
doesn't implicitely convert bytes to strings.
Signed-off-by: Markus Klotzbuecher <mk@mkio.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Commit b237d358b425 ("moveconfig: expand simple expressions") added
support for expanding expressions in configs, but used the unsafe python
built-in "eval". This patch fixes this by replacing eval with the
asteval module.
Signed-off-by: Markus Klotzbuecher <mk@mkio.de> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Commit 856b9cdb53f0 ("powerpc: mpc85xx: delete FSL_SATA for T2080QDS
board.") is to fit support sata DM mode, Now the driver will be reverted,
So revert it.
Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Commit 1ee494291880 ("ata: fsl_ahci: Add sata DM support for Freescale
powerpc socs") introduced SCSI layer to call AHCI private API in order
to support sata operations, In DM mode, This is not necessary for
non-AHCI sata. So revert it and have already updated the driver itself
to operate sata directly.
Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Update doc/sphinx/kerneldoc.py from Linux next-20200219 to avoid warnings
like:
doc/sphinx/kerneldoc.py:125: RemovedInSphinx20Warning:
AutodocReporter is now deprecated. Use
sphinx.util.docutils.switch_source_input() instead.
self.state.memo.reporter =
AutodocReporter(result, self.state.memo.reporter)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Masahiro Yamada [Fri, 14 Feb 2020 07:40:27 +0000 (16:40 +0900)]
mmc: sdhci: fix missing cache invalidation after reading by DMA
This driver currently performs cache operation before the DMA start,
but does nothing after the DMA completion.
When reading data by DMA, the cache invalidation is needed also after
finishing the DMA transfer. Otherwise, the CPU might read data from
the cache instead of from the main memory when speculative memory read
or memory prefetch occurs.
Instead of calling the cache operation directly, this commit adds
dma_unmap_single(), which performs cache invalidation internally,
but drivers do not need which operation is being run.
Masahiro Yamada [Fri, 14 Feb 2020 07:40:26 +0000 (16:40 +0900)]
mmc: sdhci: use dma_map_single() instead of flush_cache() before DMA
Currently, sdhci_prepare_dma() calls flush_cache() regardless of the
DMA direction.
Actually, cache invalidation is enough when reading data from the device.
This is correctly handled by dma_map_single(), which mimics the DMA-API
in Linux kernel. Drivers can be agnostic which cache operation occurs
behind the scene.
This commit also sanitizes the difference between the virtual address
and the dma address.
Kever Yang [Wed, 19 Feb 2020 09:51:07 +0000 (17:51 +0800)]
rockchip: rk3399: add target type for evb based board
There are many boards share the board file and device header file with
rk3399 evb, add target type MACRO so that it is fixed instead of default
to the first target in "RK3399 board select".
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Masahiro Yamada [Fri, 14 Feb 2020 07:40:19 +0000 (16:40 +0900)]
dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>
The implementation of dma_map_single() and dma_unmap_single() is
exactly the same for all the architectures that support them.
Factor them out to <linux/dma-mapping.h>, and make all drivers to
include <linux/dma-mapping.h> instead of <asm/dma-mapping.h>.
If we need to differentiate them for some architectures, we can
move the generic definitions to <asm-generic/dma-mapping.h>.
Add some comments to the helpers. The concept is quite similar to
the DMA-API of Linux kernel. Drivers are agnostic about what is
going on behind the scene. Just call dma_map_single() before the
DMA, and dma_unmap_single() after it.
Rasmus Villemoes [Thu, 30 Jan 2020 12:06:45 +0000 (12:06 +0000)]
mmc: fsl_esdhc: actually enable cache snooping on mpc830x
The reference manuals for MPC8308 and MPC8309 both say that the
esdhcctl aka DMA Control Register "is implemented as SDHCCR" in the
System configuration registers. Unfortunately, that doesn't mean that
the registers are just mirrors of each other - any write to esdhcctl
is simply ignored. So to actually enable cache snooping, we
unfortunately have to add a little ifdeffery.
There is, naturally, no description of the bit fields of esdhcctl in
the MPC8309 manual, but comparing the description of esdhcctl from the
LS1021A reference manual to the description of the sdhccr in MPC8309,
one also finds that the fields are bit-reversed, so the bit to set is
0x02000000 rather than 0x00000040 - this is also what board_mmc_init()
uses in the two gdsys/mpc8308/ boards.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Yangbo Lu <yangbo.lu@nxp.com>
Suniel Mahesh [Mon, 3 Feb 2020 13:50:05 +0000 (19:20 +0530)]
board: roc-pc-rk3399: Add support for onboard LED's and push button to indicate power mode
Added support for onboard LED's and push button. When powered board will be
in low power mode(yellow LED), on button press, board enters full power mode
(red LED) and boots u-boot.
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Suniel Mahesh [Mon, 3 Feb 2020 13:50:04 +0000 (19:20 +0530)]
rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399
roc-pc-rk3399 board has one user button & three user LED's. Currently
we don't have any code support for these devices. Since button and LED's are
specific to roc-pc-rk3399 board, split it into its own board file and add code
support here.
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Hugh Cole-Baker [Sat, 25 Jan 2020 16:19:36 +0000 (16:19 +0000)]
rockchip: boot_mode: find the saradc device name
adc_channel_single_shot() requires the full device name e.g.
"saradc@ff100000", which differs between Rockchip SoC's, but they all
share the prefix "saradc"; find the ADC device with this name prefix and
use its full name.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
projects / u-boot.git / log
