From: Stefan Roese <sr@denx.de>
Date: Wed, 30 Jan 2019 07:54:13 +0000 (+0100)
Subject: arm: mvebu: theadorable: Enable video / LCD support with the new DM driver
X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=f18220919079eeb8e79f4791e152f1db073574a8;p=u-boot.git

arm: mvebu: theadorable: Enable video / LCD support with the new DM driver

With the new DM_VIDEO support in the Armada XP LCD driver, this patch
adds the needed DT node for the LCD controller to the theadorable dts
file. This DT property is not added to the Armada XP dtsi files, as this
LCD feature is pretty unusual for this SoC and I personally know of no
other board that uses this controller.

This patch also enables CONFIG_BMP_16BPP/24BPP/32BPP, as the "old" bmp
command supported these BMP files.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
---

diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts
index 9b66ec678d..5695e9b758 100644
--- a/arch/arm/dts/armada-xp-theadorable.dts
+++ b/arch/arm/dts/armada-xp-theadorable.dts
@@ -159,6 +159,31 @@
 					spi-max-frequency = <27777777>;
 				};
 			};
+
+			/* The LCD controller is only used on this board */
+			lcd0: lcd-controller@e0000 {
+				compatible = "marvell,armada-xp-lcd";
+				reg = <0xe0000 0x10000>;
+				status = "okay";
+				u-boot,dm-pre-reloc;
+
+				display-timings {
+					native-mode = <&timing0>;
+					timing0: panel0 {
+						hactive = <240>;
+						vactive = <320>;
+						hfront-porch = <1>;
+						hback-porch = <45>;
+						vfront-porch = <1>;
+						vback-porch = <3>;
+
+						/* Some dummy parameters */
+						clock-frequency = <0>;
+						hsync-len = <0>;
+						vsync-len = <0>;
+					};
+				};
+			};
 		};
 	};
 };
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 27c858013d..886456ec26 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -65,6 +65,10 @@
 /* Enable LCD and reserve 512KB from top of memory*/
 #define CONFIG_SYS_MEM_TOP_HIDE		0x80000
 
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+
 /* FPGA programming support */
 #define CONFIG_FPGA_STRATIX_V