From: York Sun <york.sun@nxp.com>
Date: Mon, 5 Nov 2018 18:01:23 +0000 (+0000)
Subject: armv8: layerscape: Enable routing SError exception
X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=bb50569dc4c3ac71af075d5e994d0a37579efc51;p=u-boot.git

armv8: layerscape: Enable routing SError exception

In case SError happens at EL2, if SCR_EL3[EA] is not routing it to
EL3, and SCR_EL3[RW] is set to aarch64, setting HCR_EL2[AMO] routes
the exception to EL2. Otherwise this exception is not taken.

Signed-off-by: York Sun <york.sun@nxp.com>
---

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index ef3987ea84..11b5fb2ec3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -71,6 +71,15 @@ ENDPROC(smp_kick_all_cpus)
 ENTRY(lowlevel_init)
 	mov	x29, lr			/* Save LR */
 
+	/* unmask SError and abort */
+	msr daifclr, #4
+
+	/* Set HCR_EL2[AMO] so SError @EL2 is taken */
+	mrs	x0, hcr_el2
+	orr	x0, x0, #0x20			/* AMO */
+	msr	hcr_el2, x0
+	isb
+
 	switch_el x1, 1f, 100f, 100f	/* skip if not in EL3 */
 1: