From: Paul Barker Date: Fri, 1 Nov 2024 14:20:16 +0000 (+0000) Subject: arm: renesas: Fix RZ/G2L GICR base address X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=9d81a9ff990bae1bcf08ae5b888e0b6e12d1b58b;p=u-boot.git arm: renesas: Fix RZ/G2L GICR base address When support for the Renesas RZ/G2L SoC was added, the GICR base address for CPU1 was accidentally used. We should instead supply the GICR base address for CPU0 so that interrupts are correctly configured for the CPU core that U-Boot is actually using. Fixes: 387d4275ab0e ("arm: rmobile: Add basic RZ/G2L family support") Signed-off-by: Paul Barker --- diff --git a/arch/arm/mach-renesas/include/mach/rzg2l.h b/arch/arm/mach-renesas/include/mach/rzg2l.h index 057df5cb9d..c49a71a6dd 100644 --- a/arch/arm/mach-renesas/include/mach/rzg2l.h +++ b/arch/arm/mach-renesas/include/mach/rzg2l.h @@ -8,6 +8,6 @@ #define __ASM_ARCH_RZG2L_H #define GICD_BASE 0x11900000 -#define GICR_BASE 0x11960000 +#define GICR_BASE 0x11940000 #endif /* __ASM_ARCH_RZG2L_H */