From: Mark Kettenis Date: Wed, 12 Jan 2022 18:55:17 +0000 (+0100) Subject: arm: apple: Use watchdog timer for system reset X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=9a8e3736da25a62449f84aef2b566e2b31ca60fd;p=u-boot.git arm: apple: Use watchdog timer for system reset Rely on the new watchdog timer driver and the sysreset uclass to reset the system. This gets rid of hard-coded addresses and should work on systems based on the new M1 Pro and M1 Max SoCs as well. Signed-off-by: Mark Kettenis Reviewed-by: Simon Glass Reviewed-by: Stefan Roese Tested-on: Apple M1 Macbook Tested-by: Simon Glass --- diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7264d72bde..78c6b2e92d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -942,6 +942,9 @@ config ARCH_APPLE select OF_CONTROL select PINCTRL select POSITION_INDEPENDENT + select SYSRESET + select SYSRESET_WATCHDOG + select SYSRESET_WATCHDOG_AUTO select USB imply CMD_DM imply CMD_GPT diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c index 0bfbc473ec..b7e8d212f1 100644 --- a/arch/arm/mach-apple/board.c +++ b/arch/arm/mach-apple/board.c @@ -119,30 +119,6 @@ int dram_init_banksize(void) return fdtdec_setup_memory_banksize(); } -#define APPLE_WDT_BASE 0x23d2b0000ULL - -#define APPLE_WDT_SYS_CTL_ENABLE BIT(2) - -typedef struct apple_wdt { - u32 reserved0[3]; - u32 chip_ctl; - u32 sys_tmr; - u32 sys_cmp; - u32 reserved1; - u32 sys_ctl; -} apple_wdt_t; - -void reset_cpu(void) -{ - apple_wdt_t *wdt = (apple_wdt_t *)APPLE_WDT_BASE; - - writel(0, &wdt->sys_cmp); - writel(APPLE_WDT_SYS_CTL_ENABLE, &wdt->sys_ctl); - - while(1) - wfi(); -} - extern long fw_dtb_pointer; void *board_fdt_blob_setup(int *err)