From: Pali Rohár Date: Sat, 25 Sep 2021 22:54:43 +0000 (+0200) Subject: arm: a37xx: pci: Do not automatically enable bus mastering on PCI Bridge X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=95e101e86ae9d4dbc29ab82bcf1cfa8820a7ba4a;p=u-boot.git arm: a37xx: pci: Do not automatically enable bus mastering on PCI Bridge Now that PCI Bridge is working for the PCIe Root Port, U-Boot's PCI_PNP code automatically enables memory access and bus mastering when needed. We do not need to enable it when setting the HW up. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún Reviewed-by: Stefan Roese --- diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 082fdc3b74..2481cbea52 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -910,12 +910,6 @@ static int pcie_advk_setup_hw(struct pcie_advk *pcie) if (pcie_advk_wait_for_link(pcie)) return -ENXIO; - reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG); - reg |= PCIE_CORE_CMD_MEM_ACCESS_EN | - PCIE_CORE_CMD_IO_ACCESS_EN | - PCIE_CORE_CMD_MEM_IO_REQ_EN; - advk_writel(pcie, reg, PCIE_CORE_CMD_STATUS_REG); - return 0; }