From: Marek Behún Date: Sat, 25 Sep 2021 22:54:46 +0000 (+0200) Subject: arm: a37xx: pci: Update private structure documentation X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=8247c90e92377afbc4c6366848e56ff8c9295ffc;p=u-boot.git arm: a37xx: pci: Update private structure documentation There were several changes for this structure but the documentation was not changed at the time. Fix this. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese --- diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 3f714cd564..38eff495ab 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -186,14 +186,15 @@ /** * struct pcie_advk - Advk PCIe controller state * - * @reg_base: The base address of the register space. - * @first_busno: This driver supports multiple PCIe controllers. - * first_busno stores the bus number of the PCIe root-port - * number which may vary depending on the PCIe setup - * (PEX switches etc). - * @sec_busno: sec_busno stores the bus number for the device behind - * the PCIe root-port - * @device: The pointer to PCI uclass device. + * @base: The base address of the register space. + * @first_busno: Bus number of the PCIe root-port. + * This may vary depending on the PCIe setup. + * @sec_busno: Bus number for the device behind the PCIe root-port. + * @dev: The pointer to PCI uclass device. + * @reset_gpio: GPIO descriptor for PERST. + * @cfgcache: Buffer for emulation of PCIe Root Port's PCI Bridge registers + * that are not available on Aardvark. + * @cfgcrssve: For CRSSVE emulation. */ struct pcie_advk { void *base;