From: Marek Vasut <marex@denx.de>
Date: Mon, 13 Aug 2018 16:32:38 +0000 (+0200)
Subject: ARM: socfpga: Enable DM reset framework on A10
X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=8145c1c299e6646aa5b68e248fbd8090cd425fba;p=u-boot.git

ARM: socfpga: Enable DM reset framework on A10

Enable the DM reset framework and DM reset driver on Arria10 both
in U-Boot and in SPL. This lets U-Boot parse reset control from DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
---

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 5c1df2cf1f..368f217fc6 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -11,6 +11,8 @@ config TARGET_SOCFPGA_ARRIA10
 	bool
 	select ALTERA_SDRAM
 	select SPL_BOARD_INIT if SPL
+	select DM_RESET
+	select SPL_DM_RESET if SPL
 
 config TARGET_SOCFPGA_CYCLONE5
 	bool