From: Simon Goldschmidt Date: Tue, 9 Apr 2019 19:02:03 +0000 (+0200) Subject: arm: socfpga: fix comment about SPL memory layout X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=798baf7ca35f81eab27dc49289745b19bde3cd39;p=u-boot.git arm: socfpga: fix comment about SPL memory layout The comment about SPL memory layout for socfpga gen5 is outdated: the initial malloc memory is now at the end of the SRAM, gd is below it (see board_init_f_alloc_reserve). Signed-off-by: Simon Goldschmidt Acked-by: Marek Vasut --- diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f9e2cdc1b3..32ee7426b6 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -236,9 +236,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * * 0xFFFF_0000 ...... Start of SRAM * 0xFFFF_xxxx ...... Top of stack (grows down) - * 0xFFFF_yyyy ...... Malloc area - * 0xFFFF_zzzz ...... Global Data - * 0xFFFF_FF00 ...... End of SRAM + * 0xFFFF_yyyy ...... Global Data + * 0xFFFF_zzzz ...... Malloc area + * 0xFFFF_FFFF ...... End of SRAM * * SRAM Memory layout for Arria 10: * 0xFFE0_0000 ...... Start of SRAM (bottom)