From: Marek Vasut Date: Tue, 27 Feb 2024 16:05:45 +0000 (+0100) Subject: ARM: renesas: Rename rmobile_get_cpu_type() to renesas_get_cpu_type() X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=6bd3a95b674cb22a14868778fe2cb61b3e5a9008;p=u-boot.git ARM: renesas: Rename rmobile_get_cpu_type() to renesas_get_cpu_type() Rename rmobile_get_cpu_type() to renesas_get_cpu_type() because all the chips are made by Renesas, while only a subset of them is from the R-Mobile line. Use the following command to perform the rename: " $ git grep -l '\' | \ xargs -I {} sed -i 's@\@renesas_get_cpu_type@g' {} " Signed-off-by: Marek Vasut Reviewed-by: Paul Barker --- diff --git a/arch/arm/mach-rmobile/cpu_info-rcar.c b/arch/arm/mach-rmobile/cpu_info-rcar.c index b9d8b5e57b..fe1795cec8 100644 --- a/arch/arm/mach-rmobile/cpu_info-rcar.c +++ b/arch/arm/mach-rmobile/cpu_info-rcar.c @@ -21,7 +21,7 @@ static u32 rmobile_get_prr(void) return readl(0xFF000044); } -u32 rmobile_get_cpu_type(void) +u32 renesas_get_cpu_type(void) { return (rmobile_get_prr() & 0x00007F00) >> 8; } diff --git a/arch/arm/mach-rmobile/cpu_info-rzg2l.c b/arch/arm/mach-rmobile/cpu_info-rzg2l.c index bd3146fb01..6c0b50ffd4 100644 --- a/arch/arm/mach-rmobile/cpu_info-rzg2l.c +++ b/arch/arm/mach-rmobile/cpu_info-rzg2l.c @@ -47,7 +47,7 @@ const u8 *rzg_get_cpu_name(void) return get_tfa_info()->cpu_name; } -u32 rmobile_get_cpu_type(void) +u32 renesas_get_cpu_type(void) { return get_tfa_info()->cpu_type; } diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c index adb7fff0c4..c7fbf39ced 100644 --- a/arch/arm/mach-rmobile/cpu_info.c +++ b/arch/arm/mach-rmobile/cpu_info.c @@ -40,7 +40,7 @@ static u32 __rmobile_get_cpu_type(void) { return 0x0; } -u32 rmobile_get_cpu_type(void) +u32 renesas_get_cpu_type(void) __attribute__((weak, alias("__rmobile_get_cpu_type"))); static u32 __rmobile_get_cpu_rev_integer(void) @@ -83,7 +83,7 @@ static const struct { static int rmobile_cpuinfo_idx(void) { - u32 cpu_type = rmobile_get_cpu_type(); + u32 cpu_type = renesas_get_cpu_type(); int i; for (i = 0; i < ARRAY_SIZE(rmobile_cpuinfo) - 1; i++) diff --git a/arch/arm/mach-rmobile/include/mach/rmobile.h b/arch/arm/mach-rmobile/include/mach/rmobile.h index bed91f07ad..464a67f78d 100644 --- a/arch/arm/mach-rmobile/include/mach/rmobile.h +++ b/arch/arm/mach-rmobile/include/mach/rmobile.h @@ -48,7 +48,7 @@ #include const u8 *rzg_get_cpu_name(void); -u32 rmobile_get_cpu_type(void); +u32 renesas_get_cpu_type(void); u32 rmobile_get_cpu_rev_integer(void); u32 rmobile_get_cpu_rev_fraction(void); #endif /* __ASSEMBLY__ */ diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c index faaf42ee90..80faae6262 100644 --- a/board/renesas/blanche/blanche.c +++ b/board/renesas/blanche/blanche.c @@ -49,7 +49,7 @@ static void blanche_init_sys(void) struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; u32 cpu_type; - cpu_type = rmobile_get_cpu_type(); + cpu_type = renesas_get_cpu_type(); if (cpu_type == 0x4A) { writel(0x4D000000, CPG_PLL1CR); writel(0x4F000000, CPG_PLL3CR); diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 71b168893f..01571625e7 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -76,7 +76,7 @@ void reset_cpu(void) int board_fit_config_name_match(const char *name) { /* PRR driver is not available yet */ - u32 cpu_type = rmobile_get_cpu_type(); + u32 cpu_type = renesas_get_cpu_type(); if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) && !strcmp(name, "r8a77950-salvator-x-u-boot")) diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index 3c2f7c5e81..5d7ebbd922 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -67,7 +67,7 @@ int board_init(void) int board_fit_config_name_match(const char *name) { /* PRR driver is not available yet */ - u32 cpu_type = rmobile_get_cpu_type(); + u32 cpu_type = renesas_get_cpu_type(); if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) && !strcmp(name, "r8a77950-ulcb-u-boot")) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index a74559ca68..4b7cf77324 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -885,28 +885,28 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) struct tmio_sd_plat *plat = dev_get_plat(dev); /* HS400 is not supported on H3 ES1.x, M3W ES1.[012], V3M, V3H ES1.x, D3 */ - if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && + if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && (rmobile_get_cpu_rev_integer() <= 1)) || - ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && (rmobile_get_cpu_rev_integer() == 1) && (rmobile_get_cpu_rev_fraction() <= 2)) || - (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) || - ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77980) && + (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) || + ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77980) && (rmobile_get_cpu_rev_integer() <= 1)) || - (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995)) + (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995)) plat->cfg.host_caps &= ~MMC_MODE_HS400; /* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */ - if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && + if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && (rmobile_get_cpu_rev_integer() >= 2)) || - ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && (rmobile_get_cpu_rev_integer() == 1) && (rmobile_get_cpu_rev_fraction() == 2)) || - (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965)) + (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965)) priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7); /* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */ - if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && (rmobile_get_cpu_rev_integer() == 1) && (rmobile_get_cpu_rev_fraction() > 2)) { priv->adjust_hs400_enable = true; @@ -917,12 +917,12 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) } /* M3W+ bad taps */ - if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && (rmobile_get_cpu_rev_integer() == 3)) priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7); /* M3N can use HS400 with manual adjustment */ - if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965) { + if (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965) { priv->adjust_hs400_enable = true; priv->adjust_hs400_offset = 3; priv->adjust_hs400_calib_table = @@ -930,7 +930,7 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) } /* E3 can use HS400 with manual adjustment */ - if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) { + if (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) { priv->adjust_hs400_enable = true; priv->adjust_hs400_offset = 3; priv->adjust_hs400_calib_table = @@ -938,9 +938,9 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) } /* H3 ES1.x, ES2.0 and M3W ES1.[0123] uses 4 tuning taps */ - if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && + if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && (rmobile_get_cpu_rev_integer() <= 2)) || - ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && (rmobile_get_cpu_rev_integer() == 1) && (rmobile_get_cpu_rev_fraction() <= 3))) priv->nrtaps = 4; @@ -948,9 +948,9 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) priv->nrtaps = 8; #endif /* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */ - if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && + if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && (rmobile_get_cpu_rev_integer() <= 1)) || - ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && (rmobile_get_cpu_rev_integer() == 1) && (rmobile_get_cpu_rev_fraction() == 0))) priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD; @@ -958,7 +958,7 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2; /* V3M handles SD0H differently than other Gen3 SoCs */ - if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) + if (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) priv->needs_clkh_fallback = true; else priv->needs_clkh_fallback = false; diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 0bcd6cfd3f..733f08ad4e 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -392,8 +392,8 @@ static int ravb_dmac_init(struct udevice *dev) writel(0x00222210, eth->iobase + RAVB_REG_TGC); /* Delay CLK: 2ns (not applicable on R-Car E3/D3) */ - if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) || - (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995)) + if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) || + (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995)) return 0; if (!dev_read_u32(dev, "rx-internal-delay-ps", &delay)) { diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c index 3eb14061c8..8a93d1b1bf 100644 --- a/drivers/spi/renesas_rpc_spi.c +++ b/drivers/spi/renesas_rpc_spi.c @@ -203,7 +203,7 @@ static void rpc_spi_flush_read_cache(struct udevice *dev) static u32 rpc_spi_get_strobe_delay(void) { #ifndef CONFIG_RZA1 - u32 cpu_type = rmobile_get_cpu_type(); + u32 cpu_type = renesas_get_cpu_type(); /* * NOTE: RPC_PHYCNT_STRTIM value: