From: Florin Chiculita Date: Mon, 22 Apr 2019 08:57:47 +0000 (+0300) Subject: board: fsl: lx2160ardb: invert AQR107 pins polarity X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=4dde343d7e9938e781feb3fbe360d6a7befa48f6;p=u-boot.git board: fsl: lx2160ardb: invert AQR107 pins polarity AQR107 PHYs interrupt pins are active-low, while the GIC expects a level-high signal. Signed-off-by: Florin Chiculita Reviewed-by: Prabhakar Kushwaha --- diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 3875d04543..6109b280c6 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -449,12 +449,20 @@ unsigned long get_board_ddr_clk(void) int board_init(void) { +#if defined(CONFIG_FSL_MC_ENET) && defined(CONFIG_TARGET_LX2160ARDB) + u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE; +#endif #ifdef CONFIG_ENV_IS_NOWHERE gd->env_addr = (ulong)&default_environment[0]; #endif select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); +#if defined(CONFIG_FSL_MC_ENET) && defined(CONFIG_TARGET_LX2160ARDB) + /* invert AQR107 IRQ pins polarity */ + out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR107_IRQ_MASK); +#endif + #ifdef CONFIG_FSL_CAAM sec_init(); #endif diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index 972bb5e102..c6bacb65ec 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -60,6 +60,7 @@ #define AQR107_PHY_ADDR1 0x04 #define AQR107_PHY_ADDR2 0x05 +#define AQR107_IRQ_MASK 0x0C #define CORTINA_NO_FW_UPLOAD #define CORTINA_PHY_ADDR1 0x0