From: Jim Liu Date: Tue, 14 Nov 2023 08:51:56 +0000 (+0800) Subject: arm: dts: npcm845-evb: fix/add node and aliases X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=438d25394353d7498559d18d72492c39cf2bc8b6;p=u-boot.git arm: dts: npcm845-evb: fix/add node and aliases Modify spi and usb aliases name. Add dt-binding for usb phy define and fix usb phy reset error. Add tpm/otpee and host_intf node. Signed-off-by: Jim Liu --- diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi index fabe5925b7..1694ef8849 100644 --- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi @@ -133,7 +133,16 @@ ranges = <0x0 0x0 0xf0000000 0x00300000>, <0xfff00000 0x0 0xfff00000 0x00016000>; - spi1: spi@201000 { + host_intf: host_intf@9f000 { + compatible = "nuvoton,npcm845-host-intf"; + reg = <0x9f000 0x1000>; + type = "espi"; + ioaddr = <0x4e>; + channel-support = <0xf>; + syscon = <&gcr>; + }; + + pspi: spi@201000 { compatible = "nuvoton,npcm845-pspi"; reg = <0x201000 0x1000>; pinctrl-names = "default"; diff --git a/arch/arm/dts/nuvoton-npcm845-evb.dts b/arch/arm/dts/nuvoton-npcm845-evb.dts index a93666cb41..0d3aaa0fff 100644 --- a/arch/arm/dts/nuvoton-npcm845-evb.dts +++ b/arch/arm/dts/nuvoton-npcm845-evb.dts @@ -2,6 +2,8 @@ // Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com /dts-v1/; + +#include #include "nuvoton-npcm845.dtsi" #include "nuvoton-npcm845-pincfg.dtsi" @@ -46,10 +48,10 @@ spi1 = &fiu1; spi3 = &fiu3; spi4 = &fiux; - spi5 = &spi1; + spi5 = &pspi; usb0 = &udc0; usb1 = &ehci1; - usb2 = &ehci2; + usb2 = &udc8; }; chosen { @@ -60,6 +62,17 @@ reg = <0x0 0x0 0x0 0x40000000>; }; + tpm@0 { + compatible = "microsoft,ftpm"; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + vsbr2: vsbr2 { compatible = "regulator-npcm845"; regulator-name = "vr2"; @@ -149,6 +162,8 @@ snps,reset-active-low; snps,reset-delays-us = <0 10000 1000000>; snps,reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; /* gpio162 */ + phy-supply = <&vsbr2>; + phy-supply-microvolt = <1800000>; status = "okay"; }; @@ -179,7 +194,7 @@ status = "okay"; }; -&spi1 { +&pspi { status = "okay"; }; @@ -197,7 +212,7 @@ &udc0 { status = "okay"; - phys = <&usbphy1 0>; + phys = <&usbphy1 NPCM_UDC0_7>; }; &sdhci0 { @@ -207,12 +222,12 @@ &ehci1 { status = "okay"; - phys = <&usbphy2 3>; + phys = <&usbphy2 NPCM_USBH1>; }; -&ehci2 { +&udc8 { status = "okay"; - phys = <&usbphy3 4>; + phys = <&usbphy3 NPCM_UDC8>; }; &rng { diff --git a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi index e49e564b79..4c6d5bed44 100644 --- a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi +++ b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi @@ -174,7 +174,7 @@ compatible = "nuvoton,npcm845-usb-phy"; #phy-cells = <1>; reg = <3>; - resets = <&rstc3 NPCM8XX_RESET_USBPHY3>; + resets = <&rstc4 NPCM8XX_RESET_USBPHY3>; status = "disabled"; }; }; diff --git a/include/dt-bindings/phy/nuvoton,npcm-usbphy.h b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h new file mode 100644 index 0000000000..46946d377d --- /dev/null +++ b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +// Copyright (c) 2023 Nuvoton Technology corporation. + +#ifndef _DT_BINDINGS_NPCM_USBPHY_H +#define _DT_BINDINGS_NPCM_USBPHY_H + +#define NPCM_UDC0_7 0 +#define NPCM_UDC8 1 +#define NPCM_UDC9 2 +#define NPCM_USBH1 3 +#define NPCM_USBH2 4 +#define NPCM_MAX_USB_CTRL_ID 4 + +#endif