From: Mark Jackson <mpfj-list@mimc.co.uk>
Date: Thu, 21 Feb 2013 02:49:38 +0000 (+0000)
Subject: Initialise correct GPMC WAITx irq for AM33xx
X-Git-Url: http://git.dujemihanovic.xyz/img/sics.gif?a=commitdiff_plain;h=296de3bbec3aa7d9103a1fee121fbad3a97d3133;p=u-boot.git

Initialise correct GPMC WAITx irq for AM33xx

Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
Fix it such that WAIT0 irq is enabled instead.

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---

diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
index b8f54abae2..b86b0ded3f 100644
--- a/arch/arm/cpu/armv7/am33xx/mem.c
+++ b/arch/arm/cpu/armv7/am33xx/mem.c
@@ -83,7 +83,7 @@ void gpmc_init(void)
 	/* global settings */
 	writel(0x00000008, &gpmc_cfg->sysconfig);
 	writel(0x00000100, &gpmc_cfg->irqstatus);
-	writel(0x00000200, &gpmc_cfg->irqenable);
+	writel(0x00000100, &gpmc_cfg->irqenable);
 	writel(0x00000012, &gpmc_cfg->config);
 	/*
 	 * Disable the GPMC0 config set by ROM code