ppc: Move mpc512x clocks to arch_global_data

Move ips_clk and csb_clk into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c
index a1a3bd4adf156ae0f125284aef658109f6b82a8a..641120f0c4cbeb531bae2246fc5e8d7ec38ae58a 100644 (file)
--- a/arch/powerpc/cpu/mpc512x/cpu.c
+++ b/arch/powerpc/cpu/mpc512x/cpu.c
@@ -68,7 +68,7 @@ int checkcpu (void)
        }
        printf ("at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n",
                strmhz(buf1, clock),
-               strmhz(buf2, gd->csb_clk),
+               strmhz(buf2, gd->arch.csb_clk),
                gd->reset_status & 0xffff);
        return 0;
 }

diff --git a/arch/powerpc/cpu/mpc512x/i2c.c b/arch/powerpc/cpu/mpc512x/i2c.c
index 0ea12806b92c718648d8677bd9b5f61a12e13d10..59040f83c9251b87b5b91a277ac077079ed2160b 100644 (file)
--- a/arch/powerpc/cpu/mpc512x/i2c.c
+++ b/arch/powerpc/cpu/mpc512x/i2c.c
@@ -250,7 +250,7 @@ static int mpc_get_fdr (int speed)
                        {126, 128}
                };
 
-               ips = gd->ips_clk;
+               ips = gd->arch.ips_clk;
                for (i = 7; i >= 0; i--) {
                        for (j = 7; j >= 0; j--) {
                                scl = 2 * (scltap[j].scl2tap +

diff --git a/arch/powerpc/cpu/mpc512x/ide.c b/arch/powerpc/cpu/mpc512x/ide.c
index dd6b2f4673d70ddb4274a580af9e6e1756e98643..7a496734e7c6b683f2ad3c6bfd8455f084a9f4e5 100644 (file)
--- a/arch/powerpc/cpu/mpc512x/ide.c
+++ b/arch/powerpc/cpu/mpc512x/ide.c
@@ -100,7 +100,7 @@ int ide_preinit (void)
        ide_set_reset(0);
 
        /* Init timings : we use PIO mode 0 timings */
-       t = 1000000000 / gd->ips_clk;   /* period in ns */
+       t = 1000000000 / gd->arch.ips_clk;      /* period in ns */
        cfg.bytes.field1 = 3;
        cfg.bytes.field2 = 3;
        cfg.bytes.field3 = (pio_specs.t1 + t) / t;

diff --git a/arch/powerpc/cpu/mpc512x/serial.c b/arch/powerpc/cpu/mpc512x/serial.c
index 58587fd5bcf59c78446a5a52f89e055ededdff39..3afbe810184500784afe0c0bcaebc0fb21806f0a 100644 (file)
--- a/arch/powerpc/cpu/mpc512x/serial.c
+++ b/arch/powerpc/cpu/mpc512x/serial.c
@@ -140,7 +140,7 @@ void serial_setbrg_dev(unsigned int idx)
        }
 
        /* calculate divisor for setting PSC CTUR and CTLR registers */
-       baseclk = (gd->ips_clk + 8) / 16;
+       baseclk = (gd->arch.ips_clk + 8) / 16;
        div = (baseclk + (baudrate / 2)) / baudrate;
 
        out_8(&psc->ctur, (div >> 8) & 0xff);

diff --git a/arch/powerpc/cpu/mpc512x/speed.c b/arch/powerpc/cpu/mpc512x/speed.c
index 9d749f22e4d6abc6d471e0f6cddac4ed483045a9..9a8f315d8255325e7fd81ea2ce834737a30564f4 100644 (file)
--- a/arch/powerpc/cpu/mpc512x/speed.c
+++ b/arch/powerpc/cpu/mpc512x/speed.c
@@ -113,9 +113,9 @@ int get_clocks (void)
                pci_clk = 333333;
        }
 
-       gd->ips_clk = ips_clk;
+       gd->arch.ips_clk = ips_clk;
        gd->pci_clk = pci_clk;
-       gd->csb_clk = csb_clk;
+       gd->arch.csb_clk = csb_clk;
        gd->cpu_clk = core_clk;
        gd->bus_clk = csb_clk;
        return 0;
@@ -128,7 +128,7 @@ int get_clocks (void)
  *********************************************/
 ulong get_bus_freq (ulong dummy)
 {
-       return gd->csb_clk;
+       return gd->arch.csb_clk;
 }
 
 int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
@@ -137,10 +137,13 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 
        printf("Clock configuration:\n");
        printf("  CPU:                 %-4s MHz\n", strmhz(buf, gd->cpu_clk));
-       printf("  Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk));
-       printf("  IPS Bus:             %-4s MHz\n", strmhz(buf, gd->ips_clk));
+       printf("  Coherent System Bus: %-4s MHz\n",
+              strmhz(buf, gd->arch.csb_clk));
+       printf("  IPS Bus:             %-4s MHz\n",
+              strmhz(buf, gd->arch.ips_clk));
        printf("  PCI:                 %-4s MHz\n", strmhz(buf, gd->pci_clk));
-       printf("  DDR:                 %-4s MHz\n", strmhz(buf, 2*gd->csb_clk));
+       printf("  DDR:                 %-4s MHz\n",
+              strmhz(buf, 2 * gd->arch.csb_clk));
        return 0;
 }
 

diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index 423e792ec021c2fb6887ff9641cbb71057ddcd3a..fa5c504653717440a0ef592d5e50c5c1d27f8f74 100644 (file)
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -97,6 +97,10 @@ struct arch_global_data {
 #if defined(CONFIG_MPC5xxx)
        unsigned long ipb_clk;
 #endif
+#if defined(CONFIG_MPC512X)
+       u32 ips_clk;
+       u32 csb_clk;
+#endif /* CONFIG_MPC512X */
 };
 
 /*
@@ -119,10 +123,6 @@ typedef    struct  global_data {
 #if defined(CONFIG_FSL_ESDHC)
        u32 sdhc_clk;
 #endif
-#if defined(CONFIG_MPC512X)
-       u32 ips_clk;
-       u32 csb_clk;
-#endif /* CONFIG_MPC512X */
 #if defined(CONFIG_MPC8220)
        unsigned long   bExtUart;
        unsigned long   inp_clk;

diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 63118a382863568799ca8bca57be150f7526fc1e..31904686b732b5e6b1bbf913e52f4877267ebbf8 100644 (file)
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -586,7 +586,7 @@ void board_init_f(ulong bootflag)
        bd->bi_vco = gd->arch.vco_out;
 #endif /* CONFIG_CPM2 */
 #if defined(CONFIG_MPC512X)
-       bd->bi_ipsfreq = gd->ips_clk;
+       bd->bi_ipsfreq = gd->arch.ips_clk;
 #endif /* CONFIG_MPC512X */
 #if defined(CONFIG_MPC5xxx)
        bd->bi_ipbfreq = gd->arch.ipb_clk;

diff --git a/drivers/net/mpc512x_fec.c b/drivers/net/mpc512x_fec.c
index ad57d566be288acf3b8c5ecf2106c10658f54fda..427e0b8b46f2306d07eff51774bfa9990d45a6eb 100644 (file)
--- a/drivers/net/mpc512x_fec.c
+++ b/drivers/net/mpc512x_fec.c
@@ -304,7 +304,7 @@ int mpc512x_fec_init_phy (struct eth_device *dev, bd_t * bis)
                 * and do not drop the Preamble.
                 */
                out_be32(&fec->eth->mii_speed,
-                        (((gd->ips_clk / 1000000) / 5) + 1) << 1);
+                        (((gd->arch.ips_clk / 1000000) / 5) + 1) << 1);
 
                /*
                 * Reset PHY, then delay 300ns