omap3_spi_write_chconf(priv, confr);
}
-static void spi_reset(struct mcspi *regs)
+static void spi_reset(struct omap3_spi_priv *priv)
{
unsigned int tmp;
- writel(OMAP3_MCSPI_SYSCONFIG_SOFTRESET, ®s->sysconfig);
+ writel(OMAP3_MCSPI_SYSCONFIG_SOFTRESET, &priv->regs->sysconfig);
do {
- tmp = readl(®s->sysstatus);
+ tmp = readl(&priv->regs->sysstatus);
} while (!(tmp & OMAP3_MCSPI_SYSSTATUS_RESETDONE));
writel(OMAP3_MCSPI_SYSCONFIG_AUTOIDLE |
OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP |
- OMAP3_MCSPI_SYSCONFIG_SMARTIDLE, ®s->sysconfig);
+ OMAP3_MCSPI_SYSCONFIG_SMARTIDLE, &priv->regs->sysconfig);
- writel(OMAP3_MCSPI_WAKEUPENABLE_WKEN, ®s->wakeupenable);
+ writel(OMAP3_MCSPI_WAKEUPENABLE_WKEN, &priv->regs->wakeupenable);
+
+ /*
+ * Set the same default mode for each channel, especially CS polarity
+ * which must be common for all SPI slaves before any transfer.
+ */
+ for (priv->cs = 0 ; priv->cs < OMAP4_MCSPI_CHAN_NB ; priv->cs++)
+ _omap3_spi_set_mode(priv);
+ priv->cs = 0;
}
static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv)
priv->pin_dir = plat->pin_dir;
priv->wordlen = SPI_DEFAULT_WORDLEN;
- spi_reset(priv->regs);
+ spi_reset(priv);
return 0;
}
#define OMAP4_MCSPI_REG_OFFSET 0x100
+#define OMAP4_MCSPI_CHAN_NB 4
+
/* OMAP3 McSPI registers */
struct mcspi_channel {
unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */
unsigned int wakeupenable; /* 0x20 */
unsigned int syst; /* 0x24 */
unsigned int modulctrl; /* 0x28 */
- struct mcspi_channel channel[4];
+ struct mcspi_channel channel[OMAP4_MCSPI_CHAN_NB];
/* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */
/* channel1: 0x40 - 0x50, bus 0 & 1 */
/* channel2: 0x54 - 0x64, bus 0 & 1 */