TI: Rework SRAM definitions and maximums

On all TI platforms the ROM defines a "downloaded image" area at or near
the start of SRAM which is followed by a reserved area.  As it is at
best bad form and at worst possibly harmful in corner cases to write in
this reserved area, we stop doing that by adding in the define
NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image
area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this.
At current we define the end of scratch space at 0x228 bytes past the
start of scratch space this this gives us a lot of room to grow.  As
these scratch uses are non-optional today, all targets are modified to
respect this boundary.

Tested on OMAP4 Pandaboard, OMAP3 Beagle xM

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Thomas Weber <weber@corscience.de>
Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Ben Whitten <ben.whitten@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: "B, Ravi" <ravibabu@ti.com>
Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Ash Charles <ashcharles@gmail.com>
Cc: "Kipisz, Steven" <s-kipisz2@ti.com>
Cc: Daniel Allred <d-allred@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Ladislav Michl <ladis@linux-mips.org>

diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h
index 47962dadf59c9b11da0c7975b2f2b92830876e2d..3293caaca4abeedde919762e7cc3333ccd2d8ce9 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/omap.h
+++ b/arch/arm/include/asm/arch-am33xx/omap.h
@@ -15,24 +15,23 @@
 #ifndef _OMAP_H_
 #define _OMAP_H_
 
+#include <linux/sizes.h>
+
 #ifdef CONFIG_AM33XX
 #define NON_SECURE_SRAM_START  0x402F0400
 #define NON_SECURE_SRAM_END    0x40310000
-#define SRAM_SCRATCH_SPACE_ADDR        0x4030B800
+#define NON_SECURE_SRAM_IMG_END        0x4030B800
 #elif defined(CONFIG_TI81XX)
 #define NON_SECURE_SRAM_START  0x40300000
 #define NON_SECURE_SRAM_END    0x40320000
-#define SRAM_SCRATCH_SPACE_ADDR        0x4031B800
+#define NON_SECURE_SRAM_IMG_END        0x4031B800
 #elif defined(CONFIG_AM43XX)
 #define NON_SECURE_SRAM_START  0x402F0400
 #define NON_SECURE_SRAM_END    0x40340000
-#define SRAM_SCRATCH_SPACE_ADDR        0x40337C00
-#define AM4372_BOARD_NAME_START        SRAM_SCRATCH_SPACE_ADDR
-#define AM4372_BOARD_NAME_END  SRAM_SCRATCH_SPACE_ADDR + 0xC
-#define AM4372_BOARD_VERSION_START     SRAM_SCRATCH_SPACE_ADDR + 0xD
-#define AM4372_BOARD_VERSION_END       SRAM_SCRATCH_SPACE_ADDR + 0x14
+#define NON_SECURE_SRAM_IMG_END        0x40337DE0
 #define QSPI_BASE              0x47900000
 #endif
+#define SRAM_SCRATCH_SPACE_ADDR        (NON_SECURE_SRAM_IMG_END - SZ_1K)
 
 /* Boot parameters */
 #ifndef __ASSEMBLY__

diff --git a/arch/arm/include/asm/arch-omap3/omap.h b/arch/arm/include/asm/arch-omap3/omap.h
index bc0e02a200cb35658f767191f7e26f9a71ac3a32..417ff895f19e472b85870bd9aa7e78f7e9e64a15 100644 (file)
--- a/arch/arm/include/asm/arch-omap3/omap.h
+++ b/arch/arm/include/asm/arch-omap3/omap.h
@@ -10,6 +10,8 @@
 #ifndef _OMAP3_H_
 #define _OMAP3_H_
 
+#include <linux/sizes.h>
+
 /* Stuff on L3 Interconnect */
 #define SMX_APE_BASE                   0x68000000
 
@@ -145,7 +147,8 @@ struct gpio {
 
 #define NON_SECURE_SRAM_START          0x40208000 /* Works for GP & EMU */
 #define NON_SECURE_SRAM_END            0x40210000
-#define SRAM_SCRATCH_SPACE_ADDR                0x4020E000
+#define NON_SECURE_SRAM_IMG_END                0x4020F000
+#define SRAM_SCRATCH_SPACE_ADDR                (NON_SECURE_SRAM_IMG_END - SZ_1K)
 
 #define LOW_LEVEL_SRAM_STACK           0x4020FFFC
 

diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 5ccda6ee94ce9f22fe23d6f90792150c30a60397..b86a7768401cd39e4633fb3bb046da965356a29e 100644 (file)
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -19,6 +19,8 @@
 #include <asm/types.h>
 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
 
+#include <linux/sizes.h>
+
 /*
  * L4 Peripherals - L4 Wakeup and L4 Core now
  */
@@ -109,7 +111,8 @@ struct s32ktimer {
  */
 #define NON_SECURE_SRAM_START  0x40304000
 #define NON_SECURE_SRAM_END    0x4030E000      /* Not inclusive */
-#define SRAM_SCRATCH_SPACE_ADDR        0x4030C000
+#define NON_SECURE_SRAM_IMG_END        0x4030C000
+#define SRAM_SCRATCH_SPACE_ADDR        (NON_SECURE_SRAM_IMG_END - SZ_1K)
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE     0x4030D000
 

diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 2fd5cda6238f431e207372c0857d1b89f679b7c7..ef8e9752450e9c59638ded3eacdbfc2f8b3bfa20 100644 (file)
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -16,6 +16,8 @@
 #include <asm/types.h>
 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
 
+#include <linux/sizes.h>
+
 /*
  * L4 Peripherals - L4 Wakeup and L4 Core now
  */
@@ -186,11 +188,13 @@ struct s32ktimer {
 #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
 #define NON_SECURE_SRAM_START  0x40300000
 #define NON_SECURE_SRAM_END    0x40380000      /* Not inclusive */
+#define NON_SECURE_SRAM_IMG_END        0x4037E000
 #else
 #define NON_SECURE_SRAM_START  0x40300000
 #define NON_SECURE_SRAM_END    0x40320000      /* Not inclusive */
+#define NON_SECURE_SRAM_IMG_END        0x4031E000
 #endif
-#define SRAM_SCRATCH_SPACE_ADDR        0x4031E000
+#define SRAM_SCRATCH_SPACE_ADDR        (NON_SECURE_SRAM_IMG_END - SZ_1K)
 
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE     0x4031F000

diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 30c42781cafb815537180d745ddbfcf40b349a3d..56a63b4944a401efb53a6121cc870ced79e4585b 100644 (file)
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -277,7 +277,8 @@
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_TEXT_BASE           0x40200800
-#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KB */

diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index ef4a8baf43ce88ea39ada6a3504899e0f2515ffa..c9bc0930e05045dbdd81a1ff0cc5f6900474b302 100644 (file)
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -335,7 +335,8 @@
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_TEXT_BASE           0x40200000
-#define CONFIG_SPL_MAX_SIZE            (64 * 1024)
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KB */

diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 518b904807bee8725f90f76592dc01c0593baecf..fe2c65ffb9c71e4435448432369858a17f2b539a 100644 (file)
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -37,9 +37,6 @@
 
 /* SPL defines. */
 #define CONFIG_SPL_TEXT_BASE           CONFIG_ISW_ENTRY_ADDR
-#define CONFIG_SPL_MAX_SIZE            (NON_SECURE_SRAM_END - \
-                                       CONFIG_PUB_ROM_DATA_SIZE - \
-                                       CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SYS_SPL_ARGS_ADDR       (CONFIG_SYS_SDRAM_BASE + \
                                         (128 << 20))
 #define CONFIG_SPL_POWER_SUPPORT

diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index 46e8d4cfd7152afcc797a0552995c524bc1c48c2..cf74dbe740aba0d6e093581cd7b697993e376635 100644 (file)
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -102,8 +102,6 @@
 #ifdef CONFIG_SPL_BUILD
 #undef CONFIG_DM_SPI
 #undef CONFIG_DM_SPI_FLASH
-#undef CONFIG_SPL_MAX_SIZE
-#define CONFIG_SPL_MAX_SIZE             (256 << 10) /* 256 KiB */
 #endif
 
 /* SPI SPL */

diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h
index 04da877db5f70db8fa3efa9204e6909d821a7c12..1de5edc3019781fbfe239c8311536662eb41cd97 100644 (file)
--- a/include/configs/bur_am335x_common.h
+++ b/include/configs/bur_am335x_common.h
@@ -46,10 +46,12 @@
  * area between 0x402F0400 and 0x4030B800 as a download area and
  * 0x4030B800 to 0x4030CE00 as a public stack area.  The ROM also
  * supports X-MODEM loading via UART, and we leverage this and then use
- * Y-MODEM to load u-boot.img, when booted over UART.
+ * Y-MODEM to load u-boot.img, when booted over UART.  We must also include
+ * the scratch space that U-Boot uses in SRAM.
  */
 #define CONFIG_SPL_TEXT_BASE           0x402F0400
-#define CONFIG_SPL_MAX_SIZE            (0x4030B800 - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 /*
  * Since SPL did pll and ddr initialization for us,

diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 03dc3cc0d91988bd75e3f0550e5c8c71b84fa2d6..5d717a4a52845aae88050390d6e46dd54ff2cb5e 100644 (file)
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -344,7 +344,8 @@
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 
 #define CONFIG_SPL_TEXT_BASE           0x40200800
-#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 /*
  * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the

diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index b896d4d79a4a221fe74c58a00c464c69b017e5d0..bdfb168f2c56ea377ca9a41101a7d70abdb37f1f 100644 (file)
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -153,7 +153,6 @@
 
 /* SPL defines. */
 #define CONFIG_SPL_TEXT_BASE           0x40300350
-#define CONFIG_SPL_MAX_SIZE            (64 * 1024)
 #define CONFIG_SYS_SPL_ARGS_ADDR       (CONFIG_SYS_SDRAM_BASE + (128 << 20))
 #define CONFIG_SPL_POWER_SUPPORT
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     (256 * 1024)

diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index b66949f4155bf6b65f776631eed4867808e0655f..ed1ee5453fbbee3e3e30c5b9582c24833f016618 100644 (file)
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -185,8 +185,6 @@
 /* In SPL, use the environment and discard MMC support for space. */
 #ifdef CONFIG_SPL_BUILD
 #undef CONFIG_SPL_MMC_SUPPORT
-#undef CONFIG_SPL_MAX_SIZE
-#define CONFIG_SPL_MAX_SIZE             (64 << 10) /* 64 KiB */
 #endif
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_ENV_IS_IN_SPI_FLASH

diff --git a/include/configs/kc1.h b/include/configs/kc1.h
index 8b957996a7b207f1abd292b1f81b6efb08353457..c1a9e643ecee0a3bd723f8672b6fa2f1c8f00001 100644 (file)
--- a/include/configs/kc1.h
+++ b/include/configs/kc1.h
@@ -119,7 +119,8 @@
 #define CONFIG_SPL_FRAMEWORK
 
 #define CONFIG_SPL_TEXT_BASE           0x40300000
-#define CONFIG_SPL_MAX_SIZE            (48 * 1024)
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000
 #define CONFIG_SPL_BSS_MAX_SIZE                (512 * 1024)
 #define CONFIG_SYS_SPL_MALLOC_START    0x80208000

diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index e87b4c0118b747c01f093a0ef27912e6f5ad6953..2397b5e6a46a2e40eed82cb8f654fbd4df3eedcd 100644 (file)
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -343,7 +343,8 @@
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x40200800
-#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KB */

diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index e0d25937f73586eb0b3a77179f593a218890f8aa..3389bf31647264cf9968c0b96eb6eb65b2f6e9b6 100644 (file)
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -16,11 +16,11 @@
 #include <configs/ti_omap3_common.h>
 #include <asm/mach-types.h>
 
-/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */
-#undef CONFIG_SPL_MAX_SIZE
+/*
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
+ */
 #undef CONFIG_SPL_TEXT_BASE
-
-#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_TEXT_BASE           0x40200000
 
 /*

diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 05a43610e524c258e74467c0dd30c18b773903a9..496da17b39f3515acde65e086312d332813eee4c 100644 (file)
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -30,11 +30,13 @@
 
 #include <configs/ti_omap3_common.h>
 
-/* Override default SPL info to minimize empty space and allow BCH8 in SPL */
+/*
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
+ * order to allow for BCH8 to fit in.
+ */
 #undef CONFIG_SPL_TEXT_BASE
-#undef CONFIG_SPL_MAX_SIZE
-#define CONFIG_SPL_TEXT_BASE   0x40200000
-#define CONFIG_SPL_MAX_SIZE    (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_TEXT_BASE           0x40200000
 
 /* Display CPU and Board information */
 

diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 618a546dedbee09b6ded2ee0d6c04f4168396812..841e4bdcc45f8900a9543eee816b14c494d47c30 100644 (file)
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -11,10 +11,12 @@
 #define CONFIG_NAND
 
 #include <configs/ti_omap3_common.h>
-#undef CONFIG_SPL_MAX_SIZE
+/*
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
+ */
 #undef CONFIG_SPL_TEXT_BASE
-#define CONFIG_SPL_TEXT_BASE   0x40200000
-#define CONFIG_SPL_MAX_SIZE    (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_TEXT_BASE           0x40200000
 
 #define CONFIG_BCH
 

diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index 3d25e3db3e6bb37c830a42e25771279821de5c28..1f9b3905b4c116a048a8abaa378cf8d9ee27cf12 100644 (file)
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -124,7 +124,8 @@
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x402F0400
-#define CONFIG_SPL_MAX_SIZE            (101 * 1024)
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KB */

diff --git a/include/configs/sniper.h b/include/configs/sniper.h
index e2f5e60b2aa57be88bf2a5188a1065c19be84a43..5062cd0e44f3193c6a4acc7aa45a4c1a4fc1690a 100644 (file)
--- a/include/configs/sniper.h
+++ b/include/configs/sniper.h
@@ -126,7 +126,8 @@
 #define CONFIG_SPL_FRAMEWORK
 
 #define CONFIG_SPL_TEXT_BASE           0x40200000
-#define CONFIG_SPL_MAX_SIZE            (54 * 1024)
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000
 #define CONFIG_SPL_BSS_MAX_SIZE                (512 * 1024)
 #define CONFIG_SYS_SPL_MALLOC_START    0x80208000

diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 521306509599c7bab80502ba2ca799c769aafab6..35030fe874c62dda19fdab583e50f9e7275f097a 100644 (file)
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -218,7 +218,8 @@
 #define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
 
 #define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_STACK               LOW_LEVEL_SRAM_STACK
 
 #define CONFIG_SYS_SPL_MALLOC_START    0x8f000000

diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 52bd8370a0323cf3e67fbeecfcd2bdfbb3f6b4b4..7b6ebdaff52b9329948ba9649e4c41c9a80e4bbd 100644 (file)
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -326,7 +326,8 @@
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 
 #define CONFIG_SPL_TEXT_BASE           0x40200800
-#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 /*
  * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the

diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index 732854eb306e2b0472458a61acbc1f3b72357537..198f64932674eebd5d1d92cc0f9bcfdfd1547006 100644 (file)
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -157,7 +157,8 @@
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x40300000
-#define CONFIG_SPL_MAX_SIZE            ((128 - 18) * 1024)
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KB */

diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index 17f12a898a8df79d710fb8e26a460a5878e7d493..071511cff59a04688b6a9b5998ff12f64dafff6e 100644 (file)
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -123,7 +123,8 @@
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE    0x40400000
-#define CONFIG_SPL_MAX_SIZE     ((128 - 18) * 1024)
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 #define CONFIG_SPL_BSS_START_ADDR   0x80000000
 #define CONFIG_SPL_BSS_MAX_SIZE     0x80000     /* 512 KB */

diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index a9b10d053297580d1cd81523c5564e81790974cc..9a671de73065845d66a73806401c6d06c58f3b11 100644 (file)
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -58,7 +58,6 @@
  * Y-MODEM to load u-boot.img, when booted over UART.
  */
 #define CONFIG_SPL_TEXT_BASE           0x402F0400
-#define CONFIG_SPL_MAX_SIZE            (0x4030B800 - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SYS_SPL_ARGS_ADDR       (CONFIG_SYS_SDRAM_BASE + \
                                         (128 << 20))
 

diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index 9f947eeb87eda98d859b983e649adfc7ab9b33d0..d60d213d54486b5b507d12575993cae32840834f 100644 (file)
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -212,14 +212,14 @@
 /*
  * Place the image at the start of the ROM defined image space (per
  * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
- * downloaded image area.  We initalize DRAM as soon as we can so that
- * we can place stack, malloc and BSS there.  We load U-Boot itself into
- * memory at 0x80800000 for legacy reasons (to not conflict with older
- * SPLs).  We have our BSS be placed 2MiB after this, to allow for the
- * default Linux kernel address of 0x80008000 to work with most sized
- * kernels, in the Falcon Mode case.  We have the SPL malloc pool at the
- * end of the BSS area.  We suggest that the stack be placed at 32MiB after
- * the start of DRAM to allow room for all of the above (handled in Kconfig).
+ * downloaded image area minus 1KiB for scratch space.  We initalize DRAM as
+ * soon as we can so that we can place stack, malloc and BSS there.  We load
+ * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
+ * with older SPLs).  We have our BSS be placed 2MiB after this, to allow for
+ * the default Linux kernel address of 0x80008000 to work with most sized
+ * kernels, in the Falcon Mode case.  We have the SPL malloc pool at the end
+ * of the BSS area.  We suggest that the stack be placed at 32MiB after the
+ * start of DRAM to allow room for all of the above (handled in Kconfig).
  */
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE           0x80800000
@@ -233,6 +233,11 @@
                                         CONFIG_SPL_BSS_MAX_SIZE)
 #define CONFIG_SYS_SPL_MALLOC_SIZE     CONFIG_SYS_MALLOC_LEN
 #endif
+#ifndef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
+#endif
+
 
 /* RAW SD card / eMMC locations. */
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        0x300 /* address 0x60000 */

diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index c54b7b55c4f49d1fa356d74b7c65c96acff6f60e..33426c89bbf4ad45e1e29d0411ed819fd687bef4 100644 (file)
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -68,7 +68,6 @@
 
 /* SPL */
 #define CONFIG_SPL_TEXT_BASE           0x40200800
-#define CONFIG_SPL_MAX_SIZE            (54 * 1024)
 #define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
 #define CONFIG_SPL_POWER_SUPPORT
 #define CONFIG_SYS_SPL_ARGS_ADDR       (CONFIG_SYS_SDRAM_BASE + \

diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index e6e88c528252e1360ec8e937a04c9acc13c85f7f..8c88ebf2f032db1efc6536e925d5435405b365fb 100644 (file)
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -151,7 +151,6 @@
  * So moving TEXT_BASE down to non-HS limit.
  */
 #define CONFIG_SPL_TEXT_BASE           0x40300000
-#define CONFIG_SPL_MAX_SIZE            (0x4030C000 - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_DISPLAY_PRINT
 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
 #define CONFIG_SYS_SPL_ARGS_ADDR       (CONFIG_SYS_SDRAM_BASE + \

diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h
index e42c88e3b92817d15138253b8cb3986ace683e78..cbdf0bc0dbbe94ac56c9f754237c0c7e9dbf4367 100644 (file)
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -154,13 +154,6 @@
 #define CONFIG_SPL_TEXT_BASE   0x40300000
 #endif
 
-/* DRA7xx/AM57xx have 512K of SRAM, OMAP5 only 128K */
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
-#define TI_ROM_BOOT_LOAD_END           0x4037E000
-#else
-#define TI_ROM_BOOT_LOAD_END           0x4031E000
-#endif
-#define CONFIG_SPL_MAX_SIZE     (TI_ROM_BOOT_LOAD_END - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_DISPLAY_PRINT
 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
 #define CONFIG_SYS_SPL_ARGS_ADDR       (CONFIG_SYS_SDRAM_BASE + \

diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index ae0e89c59456f0e42eeda990de76590a4b92d97c..e5d321ac6a00f0af18eb1da3a5e5f9ffa1fc72fc 100644 (file)
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -338,7 +338,8 @@
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 
 #define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE            (57 * 1024)     /* 7 KB for stack */
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000