]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: renesas: Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sun, 17 Sep 2023 14:13:04 +0000 (16:13 +0200)
committerMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 30 Sep 2023 22:08:29 +0000 (00:08 +0200)
Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
arch/arm/dts/r8a77951.dtsi
arch/arm/dts/salvator-common.dtsi
arch/arm/dts/salvator-xs.dtsi
arch/arm/dts/ulcb-audio-graph-card.dtsi [new file with mode: 0644]
arch/arm/dts/ulcb-audio-graph-card2.dtsi [new file with mode: 0644]
arch/arm/dts/ulcb.dtsi

index 07c8763c1e77fc8a73ef081c90cc564ebe045b66..6d15229d25ab101d32436950ecda3f589d7f953b 100644 (file)
@@ -75,7 +75,6 @@
                        opp-hz = /bits/ 64 <1600000000>;
                        opp-microvolt = <900000>;
                        clock-latency-ns = <300000>;
-                       turbo-mode;
                };
                opp-1700000000 {
                        opp-hz = /bits/ 64 <1700000000>;
 
                rcar_sound: sound@ec500000 {
                        /*
-                        * #sound-dai-cells is required
+                        * #sound-dai-cells is required if simple-card
                         *
                         * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
                         * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
                                 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
                                 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
                                 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 318>;
+                       iommu-map = <0 &ipmmu_hc 1 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index 23fdd1115b21fcaca032f441e4a27790800587bb..4a3d5037821f12f51664b6016969741325946ec1 100644 (file)
 
 / {
        aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
+               i2c7 = &i2c_dvfs;
                serial0 = &scif2;
                serial1 = &hscif1;
                ethernet0 = &avb;
+               mmc0 = &sdhi2;
+               mmc1 = &sdhi0;
+               mmc2 = &sdhi3;
        };
 
        chosen {
 
                port {
                        hdmi0_con: endpoint {
+                               remote-endpoint = <&rcar_dw_hdmi0_out>;
                        };
                };
        };
                };
        };
 
-       reg_1p8v: regulator0 {
+       reg_1p8v: regulator-1p8v {
                compatible = "regulator-fixed";
                regulator-name = "fixed-1.8V";
                regulator-min-microvolt = <1800000>;
                regulator-always-on;
        };
 
-       reg_3p3v: regulator1 {
+       reg_3p3v: regulator-3p3v {
                compatible = "regulator-fixed";
                regulator-name = "fixed-3.3V";
                regulator-min-microvolt = <3300000>;
                regulator-always-on;
        };
 
-       reg_12v: regulator2 {
+       reg_12v: regulator-12v {
                compatible = "regulator-fixed";
                regulator-name = "fixed-12V";
                regulator-min-microvolt = <12000000>;
 
                label = "rcar-sound";
 
-               dais = <&rsnd_port0>;
+               dais = <&rsnd_port0     /* ak4613 */
+                       &rsnd_port1     /* HDMI0  */
+#ifdef SOC_HAS_HDMI1
+                       &rsnd_port2     /* HDMI1  */
+#endif
+                       >;
        };
 
        vbus0_usb2: regulator-vbus0-usb2 {
        };
 };
 
+&a57_0 {
+       cpu-supply = <&dvfs>;
+};
+
 &audio_clk_a {
        clock-frequency = <22579200>;
 };
        pinctrl-0 = <&avb_pins>;
        pinctrl-names = "default";
        phy-handle = <&phy0>;
-       phy-mode = "rgmii-txid";
+       tx-internal-delay-ps = <2000>;
        status = "okay";
 
        phy0: ethernet-phy@0 {
 
        ports {
                port@0 {
-                       reg = <0>;
                        csi20_in: endpoint {
                                clock-lanes = <0>;
                                data-lanes = <1>;
 
        ports {
                port@0 {
-                       reg = <0>;
-
                        csi40_in: endpoint {
                                clock-lanes = <0>;
                                data-lanes = <1 2 3 4>;
 
        ports {
                port@0 {
-                       endpoint {
+                       du_out_rgb: endpoint {
                                remote-endpoint = <&adv7123_in>;
                        };
                };
        clock-frequency = <32768>;
 };
 
+&hdmi0 {
+       status = "okay";
+
+       ports {
+               port@1 {
+                       reg = <1>;
+                       rcar_dw_hdmi0_out: endpoint {
+                               remote-endpoint = <&hdmi0_con>;
+                       };
+               };
+               port@2 {
+                       reg = <2>;
+                       dw_hdmi0_snd_in: endpoint {
+                               remote-endpoint = <&rsnd_endpoint1>;
+                       };
+               };
+       };
+};
+
+#ifdef SOC_HAS_HDMI1
+&hdmi1 {
+       status = "okay";
+
+       ports {
+               port@1 {
+                       reg = <1>;
+                       rcar_dw_hdmi1_out: endpoint {
+                               remote-endpoint = <&hdmi1_con>;
+                       };
+               };
+               port@2 {
+                       reg = <2>;
+                       dw_hdmi1_snd_in: endpoint {
+                               remote-endpoint = <&rsnd_endpoint2>;
+                       };
+               };
+       };
+};
+
+&hdmi1_con {
+       remote-endpoint = <&rcar_dw_hdmi1_out>;
+};
+#endif /* SOC_HAS_HDMI1 */
+
 &hscif1 {
        pinctrl-0 = <&hscif1_pins>;
        pinctrl-names = "default";
                reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
                            "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
 
-               #address-cells = <1>;
-               #size-cells = <0>;
-
                interrupt-parent = <&gpio6>;
                interrupt-names = "intrq1", "intrq2";
                interrupts = <30 IRQ_TYPE_LEVEL_LOW>,
                             <31 IRQ_TYPE_LEVEL_LOW>;
 
-               port@7 {
-                       reg = <7>;
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@7 {
+                               reg = <7>;
 
-                       adv7482_ain7: endpoint {
-                               remote-endpoint = <&cvbs_con>;
+                               adv7482_ain7: endpoint {
+                                       remote-endpoint = <&cvbs_con>;
+                               };
                        };
-               };
 
-               port@8 {
-                       reg = <8>;
+                       port@8 {
+                               reg = <8>;
 
-                       adv7482_hdmi: endpoint {
-                               remote-endpoint = <&hdmi_in_con>;
+                               adv7482_hdmi: endpoint {
+                                       remote-endpoint = <&hdmi_in_con>;
+                               };
                        };
-               };
 
-               port@a {
-                       reg = <10>;
+                       port@a {
+                               reg = <10>;
 
-                       adv7482_txa: endpoint {
-                               clock-lanes = <0>;
-                               data-lanes = <1 2 3 4>;
-                               remote-endpoint = <&csi40_in>;
+                               adv7482_txa: endpoint {
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2 3 4>;
+                                       remote-endpoint = <&csi40_in>;
+                               };
                        };
-               };
 
-               port@b {
-                       reg = <11>;
+                       port@b {
+                               reg = <11>;
 
-                       adv7482_txb: endpoint {
-                               clock-lanes = <0>;
-                               data-lanes = <1>;
-                               remote-endpoint = <&csi20_in>;
+                               adv7482_txb: endpoint {
+                                       clock-lanes = <0>;
+                                       data-lanes = <1>;
+                                       remote-endpoint = <&csi20_in>;
+                               };
                        };
                };
        };
 };
 
 &rcar_sound {
-       pinctrl-0 = <&sound_pins &sound_clk_pins>;
+       pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
        pinctrl-names = "default";
 
-       /* Single DAI */
-       #sound-dai-cells = <0>;
-
        /* audio_clkout0/1/2/3 */
        #clock-cells = <1>;
        clock-frequency = <12288000 11289600>;
                                bitclock-master = <&rsnd_endpoint0>;
                                frame-master = <&rsnd_endpoint0>;
 
-                               playback = <&ssi0 &src0 &dvc0>;
-                               capture  = <&ssi1 &src1 &dvc1>;
+                               playback = <&ssi0>, <&src0>, <&dvc0>;
+                               capture = <&ssi1>, <&src1>, <&dvc1>;
+                       };
+               };
+
+               rsnd_port1: port@1 {
+                       reg = <1>;
+                       rsnd_endpoint1: endpoint {
+                               remote-endpoint = <&dw_hdmi0_snd_in>;
+
+                               dai-format = "i2s";
+                               bitclock-master = <&rsnd_endpoint1>;
+                               frame-master = <&rsnd_endpoint1>;
+
+                               playback = <&ssi2>;
+                       };
+               };
+
+#ifdef SOC_HAS_HDMI1
+               rsnd_port2: port@2 {
+                       reg = <2>;
+                       rsnd_endpoint2: endpoint {
+                               remote-endpoint = <&dw_hdmi1_snd_in>;
+
+                               dai-format = "i2s";
+                               bitclock-master = <&rsnd_endpoint2>;
+                               frame-master = <&rsnd_endpoint2>;
+
+                               playback = <&ssi3>;
+                       };
+               };
+#endif /* SOC_HAS_HDMI1 */
+       };
+};
+
+&rpc {
+       /* Left disabled.  To be enabled by firmware when unlocked. */
+
+       flash@0 {
+               compatible = "cypress,hyperflash", "cfi-flash";
+               reg = <0>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       bootparam@0 {
+                               reg = <0x00000000 0x040000>;
+                               read-only;
+                       };
+                       bl2@40000 {
+                               reg = <0x00040000 0x140000>;
+                               read-only;
+                       };
+                       cert_header_sa6@180000 {
+                               reg = <0x00180000 0x040000>;
+                               read-only;
+                       };
+                       bl31@1c0000 {
+                               reg = <0x001c0000 0x040000>;
+                               read-only;
+                       };
+                       tee@200000 {
+                               reg = <0x00200000 0x440000>;
+                               read-only;
+                       };
+                       uboot@640000 {
+                               reg = <0x00640000 0x100000>;
+                               read-only;
+                       };
+                       dtb@740000 {
+                               reg = <0x00740000 0x080000>;
+                       };
+                       kernel@7c0000 {
+                               reg = <0x007c0000 0x1400000>;
+                       };
+                       user@1bc0000 {
+                               reg = <0x01bc0000 0x2440000>;
                        };
                };
        };
        status = "okay";
 };
 
+#ifdef SOC_HAS_SATA
+&sata {
+       status = "okay";
+};
+#endif /* SOC_HAS_SATA */
+
 &scif1 {
        pinctrl-0 = <&scif1_pins>;
        pinctrl-names = "default";
        bus-width = <8>;
        mmc-hs200-1_8v;
        mmc-hs400-1_8v;
+       no-sd;
+       no-sdio;
        non-removable;
        fixed-emmc-driver-type = <1>;
+       full-pwr-cycle-in-suspend;
        status = "okay";
 };
 
 
        status = "okay";
 };
+
+#ifdef SOC_HAS_USB2_CH2
+&ehci2 {
+       status = "okay";
+};
+
+&ohci2 {
+       status = "okay";
+};
+
+&pfc {
+       usb2_pins: usb2 {
+               groups = "usb2";
+               function = "usb2";
+       };
+};
+
+&usb2_phy2 {
+       pinctrl-0 = <&usb2_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+#endif /* SOC_HAS_USB2_CH2 */
index 717d42758cbc4b399e6dc9b4af0333a62fdda5ca..08b925624e129205681d4e5feefee8596ddec2e1 100644 (file)
                clock-names = "xin";
        };
 };
+
+#ifdef SOC_HAS_SATA
+&pca9654 {
+       pcie-sata-switch-hog {
+               gpio-hog;
+               gpios = <7 GPIO_ACTIVE_HIGH>;
+               output-low; /* enable SATA by default */
+               line-name = "PCIE/SATA switch";
+       };
+};
+
+/* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */
+#endif /* SOC_HAS_SATA */
+
+#ifdef SOC_HAS_USB2_CH3
+&ehci3 {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&hsusb3 {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&ohci3 {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&pfc {
+       /*
+        * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
+        *   (when SW31 is the default setting on Salvator-XS).
+        * - If SW31 is the default setting, you cannot use USB2.0 ch3 on
+        *   r8a77951 with Salvator-XS.
+        *   Hence the SW31 setting must be changed like 2) below.
+        *   1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
+        *      - Connect GP6_3[01] to ADV7842.
+        *   2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
+        *      - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
+        *      - Connect GP6_{04,21} to ADV7842.
+        */
+       usb2_ch3_pins: usb2_ch3 {
+               groups = "usb2_ch3";
+               function = "usb2_ch3";
+       };
+};
+
+&usb2_phy3 {
+       pinctrl-0 = <&usb2_ch3_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+#endif /* SOC_HAS_USB2_CH3 */
diff --git a/arch/arm/dts/ulcb-audio-graph-card.dtsi b/arch/arm/dts/ulcb-audio-graph-card.dtsi
new file mode 100644 (file)
index 0000000..3be54df
--- /dev/null
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree for ULCB + Audio Graph Card
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ */
+
+/*
+ *     (A) CPU0 <-----> ak4613
+ *     (B) CPU1  -----> HDMI
+ *
+ *     (A) aplay   -D plughw:0,0 xxx.wav
+ *     (B) aplay   -D plughw:0,1 xxx.wav
+ *
+ *     (A) arecord -D plughw:0,0 xxx.wav
+ */
+
+/ {
+       sound_card: sound {
+               compatible = "audio-graph-card";
+               label = "rcar-sound";
+
+               dais = <&rsnd_port0 /* (A) CPU0 <-> ak4613 */
+                       &rsnd_port1 /* (B) CPU1  -> HDMI   */
+               >;
+       };
+};
+
+&ak4613 {
+       #sound-dai-cells = <0>;
+
+       port {
+               /*
+                * (A) CPU0 <-> ak4613
+                */
+               ak4613_endpoint: endpoint {
+                       remote-endpoint = <&rsnd_for_ak4613>;
+               };
+       };
+};
+
+&hdmi0 {
+       ports {
+               port@2 {
+                       /*
+                        * (B) CPU1 -> HDMI
+                        */
+                       dw_hdmi0_snd_in: endpoint {
+                               remote-endpoint = <&rsnd_for_hdmi>;
+                       };
+               };
+       };
+};
+
+&rcar_sound {
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               rsnd_port0: port@0 {
+                       /*
+                        * (A) CPU0 <-> ak4613
+                        */
+                       reg = <0>;
+                       rsnd_for_ak4613: endpoint {
+                               remote-endpoint = <&ak4613_endpoint>;
+                               bitclock-master;
+                               frame-master;
+                               playback = <&ssi0>, <&src0>, <&dvc0>;
+                               capture  = <&ssi1>, <&src1>, <&dvc1>;
+                       };
+               };
+               rsnd_port1: port@1 {
+                       /*
+                        * (B) CPU1 -> HDMI
+                        */
+                       reg = <1>;
+                       rsnd_for_hdmi: endpoint {
+                               remote-endpoint = <&dw_hdmi0_snd_in>;
+                               bitclock-master;
+                               frame-master;
+                               playback = <&ssi2>;
+                       };
+               };
+       };
+};
diff --git a/arch/arm/dts/ulcb-audio-graph-card2.dtsi b/arch/arm/dts/ulcb-audio-graph-card2.dtsi
new file mode 100644 (file)
index 0000000..5ebec12
--- /dev/null
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree for ULCB + Audio Graph Card2
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ */
+
+/*
+ *     (A) CPU0 <----> ak4613
+ *     (B) CPU1  ----> HDMI
+ *
+ *     (A) aplay   -D plughw:0,0 xxx.wav
+ *     (B) aplay   -D plughw:0,1 xxx.wav
+ *
+ *     (A) arecord -D plughw:0,0 xxx.wav
+ */
+#include "ulcb-audio-graph-card.dtsi"
+
+&sound_card {
+       compatible = "audio-graph-card2";
+
+       /delete-property/ dais;
+       links = <&rsnd_port0    /* (A) CPU0 <-> ak4613 */
+                &rsnd_port1    /* (B) CPU1  -> HDMI   */
+               >;
+};
index 29cedf4dc1a9df19fa6278c3fd08d612c8fe15e2..0be2716659e96fba4a3636078ca50fcbc3e0131e 100644 (file)
@@ -6,14 +6,6 @@
  * Copyright (C) 2016 Cogent Embedded, Inc.
  */
 
-/*
- * SSI-AK4613
- *     aplay   -D plughw:0,0 xxx.wav
- *     arecord -D plughw:0,0 xxx.wav
- * SSI-HDMI
- *     aplay   -D plughw:0,1 xxx.wav
- */
-
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
                regulator-always-on;
        };
 
-       sound_card: sound {
-               compatible = "audio-graph-card2";
-               label = "rcar-sound";
-
-               links = <&rsnd_port0    /* ak4613 */
-                        &rsnd_port1    /* HDMI0  */
-                       >;
-       };
-
        vcc_sdhi0: regulator-vcc-sdhi0 {
                compatible = "regulator-fixed";
 
                };
                port@2 {
                        reg = <2>;
-                       dw_hdmi0_snd_in: endpoint {
-                               remote-endpoint = <&rsnd_for_hdmi>;
-                       };
                };
        };
 };
 
        ak4613: codec@10 {
                compatible = "asahi-kasei,ak4613";
-               #sound-dai-cells = <0>;
                reg = <0x10>;
                clocks = <&rcar_sound 3>;
 
                asahi-kasei,out4-single-end;
                asahi-kasei,out5-single-end;
                asahi-kasei,out6-single-end;
-
-               port {
-                       ak4613_endpoint: endpoint {
-                               remote-endpoint = <&rsnd_for_ak4613>;
-                       };
-               };
        };
 
        cs2000: clk-multiplier@4f {
                        };
                };
        };
+
+       eeprom@50 {
+               compatible = "rohm,br24t01", "atmel,24c01";
+               reg = <0x50>;
+               pagesize = <8>;
+       };
 };
 
 &ohci1 {
        pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
        pinctrl-names = "default";
 
-       /* Single DAI */
-       #sound-dai-cells = <0>;
-
        /* audio_clkout0/1/2/3 */
        #clock-cells = <1>;
        clock-frequency = <12288000 11289600>;
                 <&audio_clk_a>, <&cs2000>,
                 <&audio_clk_c>,
                 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
-
-       ports {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               rsnd_port0: port@0 {
-                       reg = <0>;
-                       rsnd_for_ak4613: endpoint {
-                               remote-endpoint = <&ak4613_endpoint>;
-                               bitclock-master;
-                               frame-master;
-                               playback = <&ssi0>, <&src0>, <&dvc0>;
-                               capture = <&ssi1>, <&src1>, <&dvc1>;
-                       };
-               };
-               rsnd_port1: port@1 {
-                       reg = <1>;
-                       rsnd_for_hdmi: endpoint {
-                               remote-endpoint = <&dw_hdmi0_snd_in>;
-                               bitclock-master;
-                               frame-master;
-                               playback = <&ssi2>;
-                       };
-               };
-       };
 };
 
 &rpc {
 
        status = "okay";
 };
+
+
+/*
+ * For sound-test.
+ *
+ * We can switch Audio Card for testing
+ *
+ * #include "ulcb-simple-audio-card.dtsi"
+ * #include "ulcb-simple-audio-card-mix+split.dtsi"
+ * #include "ulcb-audio-graph-card.dtsi"
+ * #include "ulcb-audio-graph-card-mix+split.dtsi"
+ * #include "ulcb-audio-graph-card2-mix+split.dtsi"
+ */
+#include "ulcb-audio-graph-card2.dtsi"