arm64: dts: ls1028a: add gpio node

Add gpio node for SoC LS1028A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index d0850237c797714467d985a1de6053ec9cc70a48..5171bf28c79e302136c22927d35dc96ba42474ac 100644 (file)
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -380,6 +380,39 @@
                status = "disabled";
        };
 
+       gpio0: gpio@2300000 {
+               compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+               reg = <0x0 0x2300000 0x0 0x10000>;
+               interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               little-endian;
+       };
+
+       gpio1: gpio@2310000 {
+               compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+               reg = <0x0 0x2310000 0x0 0x10000>;
+               interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               little-endian;
+       };
+
+       gpio2: gpio@2320000 {
+               compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+               reg = <0x0 0x2320000 0x0 0x10000>;
+               interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               little-endian;
+       };
+
        sata: sata@3200000 {
                compatible = "fsl,ls1028a-ahci";
                reg = <0x0 0x3200000 0x0 0x10000        /* ccsr sata base */