Convert CONFIG_CHIP_SELECTS_PER_CTRL to Kconfig

This converts the following to Kconfig:
   CONFIG_CHIP_SELECTS_PER_CTRL

Cc: Alison Wang <alison.wang@nxp.com>
Cc: Pramod Kumar <pramod.kumar_1@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 6a948d7ba7f4233a65357c53fa0d8a1c34086f74..ef1f45650f3ed113bade388923a62228755bee90 100644 (file)
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -5,7 +5,7 @@ config ARCH_LS1021A
        select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
        select SYS_FSL_ERRATUM_A008378
        select SYS_FSL_ERRATUM_A008407
-       select SYS_FSL_ERRATUM_A008850
+       select SYS_FSL_ERRATUM_A008850 if SYS_FSL_DDR
        select SYS_FSL_ERRATUM_A008997 if USB
        select SYS_FSL_ERRATUM_A009007 if USB
        select SYS_FSL_ERRATUM_A009008 if USB

diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 8a95ee86a9b74b2ba917447a1d71587605c24eff..c131d92b9938253357e3d634a89eca4817304afd 100644 (file)
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -12,7 +12,9 @@
 #include <asm/arch/ls102xa_soc.h>
 #include <asm/arch/ls102xa_stream_id.h>
 #include <fsl_csu.h>
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008850
 #include <fsl_ddr_sdram.h>
+#endif
 
 struct liodn_id_table sec_liodn_tbl[] = {
        SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10),

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 2ded3e4efc902037a29321db69b41fb8be90b923..177f568f26ee30b1830120c7c0e4037d29c05a5c 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -8,7 +8,6 @@
 #include <clock_legacy.h>
 #include <cpu_func.h>
 #include <env.h>
-#include <fsl_ddr_sdram.h>
 #include <init.h>
 #include <hang.h>
 #include <log.h>
@@ -36,6 +35,7 @@
 #endif
 #include <asm/armv8/sec_firmware.h>
 #ifdef CONFIG_SYS_FSL_DDR
+#include <fsl_ddr_sdram.h>
 #include <fsl_ddr.h>
 #endif
 #include <asm/arch/clock.h>
@@ -1632,11 +1632,13 @@ void update_early_mmu_table(void)
 
 __weak int dram_init(void)
 {
+#ifdef CONFIG_SYS_FSL_DDR
        fsl_initdram();
 #if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
        defined(CONFIG_SPL_BUILD)
        /* This will break-before-make MMU for DDR */
        update_early_mmu_table();
+#endif
 #endif
 
        return 0;

diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index e040e5dc09e4fac467382261249a660764d0d2cb..76d2b551a7a09db1333c5bbf2f1f00a4d4f495d6 100644 (file)
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -33,6 +33,7 @@ CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="8548cds/uImage.uboot"
 CONFIG_DM=y
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index c508d61055fa778dad96da145e19155faf63485a..6a5508746899552ffe5b14b35a6c2f0b96e3ea0a 100644 (file)
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="8548cds/uImage.uboot"
 CONFIG_DM=y
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index d6addc7ed163f2fbe1e3a8ace4a95453bff6cc51..ae262bf66d0388bd3a339ddf3612bec12ba760ea 100644 (file)
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="8548cds/uImage.uboot"
 CONFIG_DM=y
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index b1bb2c552d11a3a04589517f477bcb9700852512..0782dce8ecce51b2a9ad8175bf18a90fcac1dc5a 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -59,6 +59,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_TPL_SYS_I2C_LEGACY=y

diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 02af639e3bbc6613816465b49816bcd87b4e5a7c..9c0df8499855531d0f3a19f379ccfc4378d780ed 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index a9ecce9af4b87b732220b942e9fe292b7dbe44e6..5804ba7d3a49575cbe9561011a647efb993556c1 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index d7248b1976dcd0d230b45742bd06407f58fd73ea..bcf82ebba4e3a8286bb6a1455910f2b9863aa331 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -55,6 +55,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 132ed6982a25680b52fb981e125076b28a8ac172..a1cd44b162899de04693ff4719e0c5235d35cfd2 100644 (file)
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -58,6 +58,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_TPL_SYS_I2C_LEGACY=y

diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 31bcb475cd516eb38545724c8b1c14b7ada26fd2..3ce8e3f646b24a3cde32302177c74fb70c8fa07c 100644 (file)
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index c3b10b581484df5246fa540da873f5de2bc7f8ef..7a6b19cccbc4b149721f3f83b5680801ffcca120 100644 (file)
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -52,6 +52,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 2e50fc8e4f57971289c23e5b91f1e4391a3af9a0..22798d8ec8013bfc4a4975999481e6ef9590cbb4 100644 (file)
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 0dc8322159f157a2b406a71ff7095edd58979984..f861734e2ff2c2f37fc147ee8b0fec29b00f5aae 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -60,6 +60,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_TPL_SYS_I2C_LEGACY=y

diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 95366b24c60f24b673f801bc02087e91a0b5aa2b..80a8f4e48f01115d88133d3c79267b83dcd2b189 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -42,6 +42,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 5a6b8550ceb3a37d67eef405a97a28ecbae2445f..4082cef228fca39ba2e0af02aa2915a8966a591f 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 656029df8c6f12dd8b46a5f02577c8ef35694df3..4b581682e2604c8def2118ad6d0bb1c9921a77da 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -56,6 +56,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 776193509878ecbcf7324bbb453913cf8b4d11f1..d8e588249e6d0633770226d8d81900eed1b1368a 100644 (file)
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -59,6 +59,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_TPL_SYS_I2C_LEGACY=y

diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index 19e54a8de89043d89dbe5b0a0afd48c8889c19bb..bec233f645aa59e0ad4f6ea08e9a9f04cbccaa83 100644 (file)
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index 598bacc5d408759dc886d837fea4b2883868982c..f8a795df3f7416bfdc50bedcc36403fc4cb163e2 100644 (file)
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index cbe6df6a186b653448fa12c657b732ab536fdfb9..510ff5e6dcb04b1d4a6822543223b09f5faa64ec 100644 (file)
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -55,6 +55,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y

diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index e1e320dbef4b0df245f4843cd568526aca798a41..b499ec3a6433e2bbb140d737623631ad1fe66bea 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -57,6 +57,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8396

diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 00661d91be25ec1d9816cf8a9cd18d6f409747fd..530693b5b60c161b48f3561cfb7bc367eaa6d877 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -52,6 +52,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 6467032bd48b8f6d9e094a4b457e7c57b0283fb1..75e58512cd630bfb2e2fdd13c1f79e3539d08c4b 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -54,6 +54,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 3009e2954e1266d419823e83dd6a5bb8503bacab..79afdab0a81c46ab8589ec956bde0cf4ed6a5bb1 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -41,6 +41,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 965eb7d2a1199df9b0196d94c532c1598096ae96..44a4ec99e512f706caedf58c03346cc0eac032f3 100644 (file)
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -56,6 +56,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8396

diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 6130ba7842f742a010376d650eaf410c3f1c608a..7e06a9aff737f0226a944be358ff13cf1e59614e 100644 (file)
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -51,6 +51,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 9c0547cb6207a2e99a3ffca90a9e520ecd9b2137..da35cddf7dddbd5c6393a0594a108ae3ce58424e 100644 (file)
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -53,6 +53,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index 353d9236ca55403bffdea7351681bbf976918a80..c8919b77999b075db2c5a64d0330106ca2dd9a65 100644 (file)
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -40,6 +40,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 919c0d0ff6ef56681457e0fea24af3e3982a1529..cfc73c4404323ac224830238842a46f2665af63d 100644 (file)
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -59,6 +59,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8796

diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 9d5d3faf83f8749ced8b21074408dbd6b0a0f012..2d3577309fd42180c8c91536b94948469297fb6f 100644 (file)
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -54,6 +54,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index e5b32daf350ef671a76e9492840745bc5fcec843..bce232e99d3a9a4c753d99ad681b309d27d440b6 100644 (file)
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -56,6 +56,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index 632a3ed9b87ad868ceb02258be73945dfd401def..5b1031796b12b78802ef7d20cd91e9c339a9db10 100644 (file)
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -43,6 +43,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index ad57ba0724222408b8ec405214efe9c680447875..1731d4fc73e0222c7c4a3a82d7eba6088ab0f9b5 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -61,6 +61,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8396

diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 4dc11436f282110d0c7b431562458e24b582193d..6662fe9616972936666060a9eac3ced037c55ad5 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -56,6 +56,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 2078af27f76c30287fbaa912ca8ad07879cde8c2..d9d1f8b7908d46219e88e94b4a8b5602ef0d2640 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -58,6 +58,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 95202dc12b87d8f2957ecb249a176f00000097b2..6111d3b76ff9ff92ca23414b9d801fafff5cb776 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -45,6 +45,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index f736336cf7c2386525c67067a7c8852c08e7b083..9e0de443fa173cdd24ab7d1e7606ad9bb7141843 100644 (file)
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -60,6 +60,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8396

diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 0e50bb26ca054a0089f54c133e488696e7cc61b8..cbe30d3062a763ff8361354a3c20b4378dce5475 100644 (file)
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -55,6 +55,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 4dbce7e36cb87b459a1ee3b8b1b78751c2d96866..7f735008147d8338e3d65035cca53dadf94dba55 100644 (file)
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -57,6 +57,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 77b16b738adcd86b062fc4e610b0a58b5e9bb9a9..728336e065a04ea26de545a244b7c12afe5c20a1 100644 (file)
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -44,6 +44,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7

diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index a6480e95fe097faa1bfabc0c9ea3f2bea2cf7381..76747d40e559a11d02e9873eb82496019e973fc1 100644 (file)
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -57,6 +57,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y

diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 418addce48de2d04a66febdcd42b8e28612caf73..a8d1fbe0242c2bbc9e75fb8a13a63e5c3c6bbe72 100644 (file)
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -56,6 +56,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y

diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 922c3bb97cb8801c6c30c3b79aaff7ffc84e070b..97345114d3367cc729ac41a348ae43548ef9e3e7 100644 (file)
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -58,6 +58,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y

diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 470fa85bfa34f1b89f120629b627e891f8e18e15..a73bbb0e729a5a09d91c4e2b2f5697fa6df3a21b 100644 (file)
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y

diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index 32c9f49cb0d7b3a1daeb74854b5fe1ea823368b8..40f471ec22cd5816d1ada251c54318dbced6c4e2 100644 (file)
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -48,6 +48,7 @@ CONFIG_DM=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y

diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index e6c998d8f873f9b0d17c55ccec5669af8497a2bb..3b3632f39d7846ec1a25e4b6c7522a532028823b 100644 (file)
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -37,6 +37,7 @@ CONFIG_DM=y
 CONFIG_SIMPLE_BUS_CORRECT_RANGE=y
 CONFIG_BLK=y
 CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_CHIP_SELECTS_PER_CTRL=0
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y

diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 034d299d8728437e8108ad44fbde6f948b67215c..e24be7a853f6eb0b826ee9b18a551c950ded4308 100644 (file)
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -46,6 +46,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_ENV_ADDR=0xFFF40000
 CONFIG_ENV_ADDR_REDUND=0xFFF20000
 CONFIG_DM=y
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFE001001
 CONFIG_SYS_OR0_PRELIM=0xFE000030

diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index b0e6df8be4124e7f181a605adc7330ad0095321a..277167060432cf5421296990c3e81e9bfca04ee7 100644 (file)
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -49,6 +49,10 @@ config SYS_NUM_DDR_CTLRS
                        ARCH_LX2162A
        default 1
 
+config CHIP_SELECTS_PER_CTRL
+       int "Number of chip selects per controller"
+       default 4
+
 config SYS_FSL_DDR_VER
        int
        default 50 if SYS_FSL_DDR_VER_50

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 08ab80026f49b0c3acb5d92e6e5074dcca235922..093061b52ffca0453f7344d9b4ab48b1781ef960 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -48,7 +48,6 @@
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 /* I2C addresses of SPD EEPROMs */
 #define SPD_EEPROM_ADDRESS     0x51    /* CTLR 0 DIMM 0 */

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index a9c4930d770a543fbc51b2b087ab3c812d1b789a..5f36951932d49e78989497988a9a3881042ca72e 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -170,7 +170,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 
 /* DDR3 Controller Settings */
 #define CONFIG_SYS_DDR_CS0_BNDS                0x0000003f

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 38341984a02901d1df4b76d572c4cc2390c81875..045d91149338f91ae84700bc4d3fe453eda1b647 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -93,7 +93,6 @@
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x52

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index a7c47c79b35e71d2622ebb3bb2681777047e7e6d..f803b51f45887d0d42d4539f70b18bb1bc9aad1b 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -152,7 +152,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 7365ee4a2ac11d9e81970365f8ffb9e87f0b6100..8a71807679ee291bda382ff0872675a187613fa7 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -132,7 +132,6 @@
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index fec70fe739ea8cd9b2fa006cbfaf352baaea0226..76e00cc095d00b41b0dbf865a305de620cae2630 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -117,7 +117,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR     2
-#define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 0c47b2ddf118b1792ede1329cb21f71b702e42f0..35064fec7e4d400b98fd084cd6d98f247f598929 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -112,7 +112,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 15a088ff22529f935ee0bf74501ecdc667ef3c61..8c9e5806e0b065faab400e6f7a48d58133f66ae6 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -93,7 +93,6 @@
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 /*
  * IFC Definitions

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index a67a89a1148f57b4f0d7f5c1eafa6c98d0746e1d..c5a8567e1f644704160ca293128f2ff096c42303 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -96,7 +96,6 @@
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS1    0x51

diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index 7b3e1d7188c54dcd2bcc1ddc5256c5c3557f0f40..97f64530456696b6520e4435379c7b9dce1cae84 100644 (file)
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -23,7 +23,6 @@
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define CONFIG_SYS_SPD_BUS_NUM         0
 #define SPD_EEPROM_ADDRESS             0x54

diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 52a5ff9382ed91a016fed53f0b3027bfc4c50089..707926f324c77dd76cfd6bc16804f4542e0390ad 100644 (file)
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -175,7 +175,6 @@
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x54

diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index 448749a7f81d93d353c662ad555d6c50c5d5ac59..9eeb7ef9bfc2b7f9e246f5f1f512284621eab7e1 100644 (file)
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -19,7 +19,6 @@
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY      0

diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index 0263bb82893f37ee62294c1dd38c40b468efe765..8191c856a93f91e517a1660b8472c2c3062637ae 100644 (file)
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -10,7 +10,6 @@
 
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 #define CONFIG_SYS_SDRAM_SIZE          0x40000000
 
 /* SATA */

diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index ef57cf6aaa31671c25f048fe5277db71719a4c51..7735a005e20aa852351989da290522f9d3c612f4 100644 (file)
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -10,9 +10,7 @@
 
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 #define CONFIG_SYS_SDRAM_SIZE          0x20000000
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 
 #ifndef CONFIG_SPL_BUILD
 #undef BOOT_TARGET_DEVICES

diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index c61865ccd4e71e898447ac85a0e7a0418dcdeb41..7d8d6ee085f379ac8e90aff022acb2f12e43a48b 100644 (file)
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -14,10 +14,8 @@
 #define BOARD_REV_MASK                 0x001A0000
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 #define SYS_SDRAM_SIZE_512             0x20000000
 #define SYS_SDRAM_SIZE_1024            0x40000000
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 
 /* ENV */
 #define CONFIG_SYS_FSL_QSPI_BASE       0x40000000

diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index cbcb3f72a5622caca40661a827dc9c7162f4df17..d57f28e4967ede2ffabd95d6acae029634e1a58c 100644 (file)
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -11,7 +11,6 @@
 
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 #define CONFIG_SYS_SDRAM_SIZE          0x40000000
 
 /*

diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index c9a152e08a27c700bd767ec8328ff37858ce4507..c51c4f2d3eabe6f453c64e9756b8438ec678b951 100644 (file)
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -11,7 +11,6 @@
 
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 #define CONFIG_SYS_SDRAM_SIZE          0x40000000
 
 /*

diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 2e5b804a4cbc124499a8a1f13fdf24400bec32cf..4e5228aa219b7f04865ae3b18c9483c25e70ce05 100644 (file)
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -59,8 +59,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
-
 /*
  * Serial Port
  */

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 864584bbbe9f30dff07e8f451173697388868d22..b6501e87b41fe7fb9ea0f624443d68fd0e2292f3 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -54,7 +54,6 @@
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE

diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h
index 5f6c2a0037072e6b093b90795843882d2b6a3212..824078dd27de73e21bbfe7d69bb5ed412ba07a6f 100644 (file)
--- a/include/configs/ls1021atsn.h
+++ b/include/configs/ls1021atsn.h
@@ -77,8 +77,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
-
 /* Serial Port */
 #define CONFIG_SYS_NS16550_SERIAL
 #ifndef CONFIG_DM_SERIAL

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 38bcb5cae31880c187cbd316c3ade1ca6dda37bd..fada8aa61db8d1e44df313e59e690fcddae10bba 100644 (file)
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -79,8 +79,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
-
 /*
  * IFC Definitions
  */

diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index a517346c1298b7f5be36335b49da560737073d62..8bdfddcbc758256ceb1b969d0ba1c0c51f71098e 100644 (file)
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -40,7 +40,6 @@
 /* Miscellaneous configurable options */
 
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           128

diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index eb95f53a77648210a88efabaebe565992bcc6da0..e9919cd05f7a0c834218b15aa3c2587def014287 100644 (file)
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -12,7 +12,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0

diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index dbeafe33579ba31e1fa5d4da4a3f2d0be0e17c32..c904c9ca90b075918aa4312fba3d61c7b1571917 100644 (file)
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -12,7 +12,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define CONFIG_SYS_SPD_BUS_NUM         0
 

diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h
index 14ad84a1ef462b92e46f23c1f7badeaac9b9b7a2..8425d17992c6ff287d607f47f3ea0a4977f06f92 100644 (file)
--- a/include/configs/ls1046afrwy.h
+++ b/include/configs/ls1046afrwy.h
@@ -11,7 +11,6 @@
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define CONFIG_SYS_UBOOT_BASE          0x40100000
 

diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index d77119a7b224fbd0578fb400e81773757b6b0917..2972e3beac222e23b137be255671ad8c8488c129 100644 (file)
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -12,7 +12,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0

diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 8ed1dceb234371e658ded68998c42a465cb97ce0..f6ff690329252c8cf80ef911b2ac7d4c65d0b5bf 100644 (file)
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -13,7 +13,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0

diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index 33b70c8d8f684770a667fcc37bd51e7317324347..965fdfead24b8ec715df586d7774eb8ba095d108 100644 (file)
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -132,7 +132,6 @@ unsigned long long get_qixis_addr(void);
 #endif
 
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           128

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index f2725af0534c47bc564ec1f0202ac6fb5e6b2685..766da3969d2cc3a917d8818030dee01ad006c03c 100644 (file)
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -139,7 +139,6 @@ unsigned long long get_qixis_addr(void);
 
 /* Physical Memory Map */
 /* fixme: these need to be checked against the board */
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           128

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 7554de1f6d31dd21f07c866751b1ef832a2c7c17..1c59a89dbcf33f14b69b72613dda0933638108cf 100644 (file)
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -27,7 +27,6 @@
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM 0       /* SPD on I2C bus 0 */
 #define CONFIG_DIMM_SLOTS_PER_CTLR             2
-#define CONFIG_CHIP_SELECTS_PER_CTRL           4
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif

diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 1c05b0867781e1309ff1de6e38cb6c6ae631812e..de77872a70984abe07916366c8dcb26aa6dbc1a2 100644 (file)
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -37,7 +37,6 @@
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM 0       /* SPD on I2C bus 0 */
 #define CONFIG_DIMM_SLOTS_PER_CTLR             2
-#define CONFIG_CHIP_SELECTS_PER_CTRL           4
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif

diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index e31f8d087f716bdf0562436f97f30802370aa2f0..c407fa8ba17f7fbffe4a1c5853ee21c270fedc3e 100644 (file)
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -34,7 +34,6 @@
 #define SPD_EEPROM_ADDRESS             SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM         0       /* SPD on I2C bus 0 */
 #define CONFIG_DIMM_SLOTS_PER_CTLR     2
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 #define CONFIG_SYS_MONITOR_LEN         (936 * 1024)
 
 /* Miscellaneous configurable options */

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 3a7adcc3f56cfca3657650591cd29f3e108d74d4..926318993ae0921d8e70c94285451b299bcf0cd8 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -164,10 +164,8 @@
 
 #if defined(CONFIG_TARGET_P1020RDB_PD)
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_2G
-#define CONFIG_CHIP_SELECTS_PER_CTRL   2
 #else
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_1G
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 #endif
 #define CONFIG_SYS_SDRAM_SIZE          (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000

diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 88b3045efb10512908b57d8aeda8d747547b3482..296361aa03885ea065d25a8d0f90de0a93d02b87 100644 (file)
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -43,8 +43,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_CHIP_SELECTS_PER_CTRL   0
-
 #define CONFIG_SYS_BOOT_BLOCK          0x00000000      /* boot TLB */
 
 #define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_TEXT_BASE

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 482a920d33ea09b699c121b431503f6d71fe93b1..4d562d49c97e54c1ef15f95732aaf7ac11b841e0 100644 (file)
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -60,7 +60,6 @@
 #define CONFIG_VERY_BIG_RAM
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   2
 
 /* I2C addresses of SPD EEPROMs */
 #define SPD_EEPROM_ADDRESS     0x50    /* CTLR 0 DIMM 0 */