]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm64: zynqmp: Use mdio node by vp-x-a2785-00-revA and vpk120-revA
authorMichal Simek <michal.simek@amd.com>
Thu, 12 Oct 2023 12:58:47 +0000 (14:58 +0200)
committerMichal Simek <michal.simek@amd.com>
Tue, 7 Nov 2023 12:47:09 +0000 (13:47 +0100)
All boards have been converted to use mdio node that's why move ethernet
phys under mdio node too.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6c60f5d29b9d9992bd0130fd263c8ed13cb8166c.1697115523.git.michal.simek@amd.com
arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
arch/arm/dts/zynqmp-vpk120-revA.dts

index 2f88aa4a0d28dd11bbd5b3035bdc659918b575a3..9ab8f5bfffe45cb47d4dcc0f24006e0cbacdd339 100644 (file)
        phy-mode = "sgmii"; /* DTG generates this properly 1512 */
        is-internal-pcspma;
        /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */
-       /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
-       phy0: ethernet-phy@0 { /* u131 - M88e1512 */
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
+               phy0: ethernet-phy@0 { /* u131 - M88e1512 */
+                       reg = <0>;
+               };
        };
 };
 
index 66919f578e0213ff607b8afe3ec9088fe098f228..ce76e0b3db3603d9e2972cbc8f42918c2a3c1bdb 100644 (file)
        phy-mode = "sgmii"; /* DTG generates this properly 1512 */
        is-internal-pcspma;
        /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */
-       /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
-       phy0: ethernet-phy@0 {
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
+               phy0: ethernet-phy@0 {
+                       reg = <0>;
+               };
        };
 };