]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()
authorHai Pham <hai.pham.ud@renesas.com>
Fri, 22 May 2020 03:39:04 +0000 (10:39 +0700)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Fri, 21 May 2021 13:00:17 +0000 (15:00 +0200)
CPG IP in some specific Renesas SoCs (i.e. new R8A779A0 V3U SoC)
requires a different setting procedure. Make struct cpg_mssr_info
accessible to handle the clock setting in that case.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
drivers/clk/renesas/clk-rcar-gen2.c
drivers/clk/renesas/clk-rcar-gen3.c
drivers/clk/renesas/renesas-cpg-mssr.c
drivers/clk/renesas/renesas-cpg-mssr.h

index b0164a6486d936a4ae0232a3aeb12f284f8d2ce1..d2d0169dd87b4b8d45a37d1acca58d96eb06768a 100644 (file)
@@ -61,14 +61,14 @@ static int gen2_clk_enable(struct clk *clk)
 {
        struct gen2_clk_priv *priv = dev_get_priv(clk->dev);
 
-       return renesas_clk_endisable(clk, priv->base, true);
+       return renesas_clk_endisable(clk, priv->base, priv->info, true);
 }
 
 static int gen2_clk_disable(struct clk *clk)
 {
        struct gen2_clk_priv *priv = dev_get_priv(clk->dev);
 
-       return renesas_clk_endisable(clk, priv->base, false);
+       return renesas_clk_endisable(clk, priv->base, priv->info, false);
 }
 
 static ulong gen2_clk_get_rate(struct clk *clk)
index 938d98546baf7f18143b5e610da2e0fc790452c8..27939d6318f7734fdd715414c580cd029a9a2bd6 100644 (file)
@@ -143,14 +143,14 @@ static int gen3_clk_enable(struct clk *clk)
 {
        struct gen3_clk_priv *priv = dev_get_priv(clk->dev);
 
-       return renesas_clk_endisable(clk, priv->base, true);
+       return renesas_clk_endisable(clk, priv->base, priv->info, true);
 }
 
 static int gen3_clk_disable(struct clk *clk)
 {
        struct gen3_clk_priv *priv = dev_get_priv(clk->dev);
 
-       return renesas_clk_endisable(clk, priv->base, false);
+       return renesas_clk_endisable(clk, priv->base, priv->info, false);
 }
 
 static u64 gen3_clk_get_rate64(struct clk *clk)
index bed2a16448a4083050cf9dab119732bd6791bcc0..0cf80a9866f0ea591cee2577c0ca89eb6ddb02db 100644 (file)
@@ -132,7 +132,8 @@ int renesas_clk_get_parent(struct clk *clk, struct cpg_mssr_info *info,
        return 0;
 }
 
-int renesas_clk_endisable(struct clk *clk, void __iomem *base, bool enable)
+int renesas_clk_endisable(struct clk *clk, void __iomem *base,
+                         struct cpg_mssr_info *info, bool enable)
 {
        const unsigned long clkid = clk->id & 0xffff;
        const unsigned int reg = clkid / 100;
index ad5d269fc49b001036b966fcb9eba61f4dcd75fc..8c8a09b90446429ec067d6ec4a82d0ac71f356b7 100644 (file)
@@ -115,7 +115,8 @@ int renesas_clk_get_core(struct clk *clk, struct cpg_mssr_info *info,
                         const struct cpg_core_clk **core);
 int renesas_clk_get_parent(struct clk *clk, struct cpg_mssr_info *info,
                           struct clk *parent);
-int renesas_clk_endisable(struct clk *clk, void __iomem *base, bool enable);
+int renesas_clk_endisable(struct clk *clk, void __iomem *base,
+                         struct cpg_mssr_info *info, bool enable);
 int renesas_clk_remove(void __iomem *base, struct cpg_mssr_info *info);
 
 #endif /* __DRIVERS_CLK_RENESAS_CPG_MSSR__ */