arm: spear: x600: Add support for Micrel KSZ9031 PHY

As the old ethernet PHY is not available any more, the x600 board has
been redesigned with the Micrel KSZ9031 PHY. This patch adds support
to autodetect the PHY and configure the Micrel PHY correctly.

Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/board/spear/x600/x600.c b/board/spear/x600/x600.c
index b8edfcd071fd4ba77443e17054694a2e5c1e602a..f8e9fddb0fb2849ac32b20c4cc40ce856ebe78c7 100644 (file)
--- a/board/spear/x600/x600.c
+++ b/board/spear/x600/x600.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <micrel.h>
 #include <nand.h>
 #include <netdev.h>
 #include <phy.h>
@@ -69,27 +70,64 @@ void board_nand_init(void)
 
 int board_phy_config(struct phy_device *phydev)
 {
-       /* Extended PHY control 1, select GMII */
-       phy_write(phydev, MDIO_DEVAD_NONE, 23, 0x0020);
-
-       /* Software reset necessary after GMII mode selction */
-       phy_reset(phydev);
-
-       /* Enable extended page register access */
-       phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0001);
-
-       /* 17e: Enhanced LED behavior, needs to be written twice */
-       phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff);
-       phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff);
-
-       /* 16e: Enhanced LED method select */
-       phy_write(phydev, MDIO_DEVAD_NONE, 16, 0xe0ea);
-
-       /* Disable extended page register access */
-       phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0000);
-
-       /* Enable clock output pin */
-       phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x0049);
+       unsigned short id1, id2;
+
+       /* check whether KSZ9031 or AR8035 has to be configured */
+       id1 = phy_read(phydev, MDIO_DEVAD_NONE, 2);
+       id2 = phy_read(phydev, MDIO_DEVAD_NONE, 3);
+
+       if ((id1 == 0x22) && ((id2 & 0xFFF0) == 0x1620)) {
+               /* PHY configuration for Micrel KSZ9031 */
+               printf("PHY KSZ9031 detected - ");
+
+               phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00);
+
+               /* control data pad skew - devaddr = 0x02, register = 0x04 */
+               ksz9031_phy_extended_write(phydev, 0x02,
+                                          MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
+                                          MII_KSZ9031_MOD_DATA_NO_POST_INC,
+                                          0x0000);
+               /* rx data pad skew - devaddr = 0x02, register = 0x05 */
+               ksz9031_phy_extended_write(phydev, 0x02,
+                                          MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
+                                          MII_KSZ9031_MOD_DATA_NO_POST_INC,
+                                          0x0000);
+               /* tx data pad skew - devaddr = 0x02, register = 0x05 */
+               ksz9031_phy_extended_write(phydev, 0x02,
+                                          MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
+                                          MII_KSZ9031_MOD_DATA_NO_POST_INC,
+                                          0x0000);
+               /* gtx and rx clock pad skew - devaddr = 0x02, reg = 0x08 */
+               ksz9031_phy_extended_write(phydev, 0x02,
+                                          MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
+                                          MII_KSZ9031_MOD_DATA_NO_POST_INC,
+                                          0x03FF);
+       } else {
+               /* PHY configuration for Vitesse VSC8641 */
+               printf("PHY VSC8641 detected - ");
+
+               /* Extended PHY control 1, select GMII */
+               phy_write(phydev, MDIO_DEVAD_NONE, 23, 0x0020);
+
+               /* Software reset necessary after GMII mode selction */
+               phy_reset(phydev);
+
+               /* Enable extended page register access */
+               phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0001);
+
+               /* 17e: Enhanced LED behavior, needs to be written twice */
+               phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff);
+               phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff);
+
+               /* 16e: Enhanced LED method select */
+               phy_write(phydev, MDIO_DEVAD_NONE, 16, 0xe0ea);
+
+               /* Disable extended page register access */
+               phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0000);
+
+               /* Enable clock output pin */
+               phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x0049);
+       }
 
        if (phydev->drv->config)
                phydev->drv->config(phydev);

diff --git a/include/configs/x600.h b/include/configs/x600.h
index 5fdd2bee049e7927fd3a3ff6944b767cb35f68f1..07c8abe2a79bd197ad92165f2bdfc45ba1340cee 100644 (file)
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -80,6 +80,8 @@
 #define CONFIG_PHY_RESET_DELAY                 10000           /* in usec */
 #define CONFIG_PHY_ADDR                0       /* PHY address */
 #define CONFIG_PHY_GIGE                        /* Include GbE speed/duplex detection */
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9031
 
 #define CONFIG_SPEAR_GPIO