arm64: dts: ls208xa: add gpio node

Add gpio node for SoC LS208xA

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index f0f4a82c146112eda888c012d0a90ea8ac0b9927..7374d580e07e5f78048d445a5be07330be8d16a9 100644 (file)
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -2,7 +2,7 @@
 /*
  * NXP ls2080a SOC common device tree source
  *
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  * Copyright 2013-2015 Freescale Semiconductor, Inc.
  */
 
@@ -120,6 +120,50 @@
                bus-width = <4>;
        };
 
+       gpio0: gpio@2300000 {
+               compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+               reg = <0x0 0x2300000 0x0 0x10000>;
+               interrupts = <0 36 0x4>; /* Level high type */
+               gpio-controller;
+               little-endian;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpio1: gpio@2310000 {
+               compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+               reg = <0x0 0x2310000 0x0 0x10000>;
+               interrupts = <0 36 0x4>; /* Level high type */
+               gpio-controller;
+               little-endian;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpio2: gpio@2320000 {
+               compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+               reg = <0x0 0x2320000 0x0 0x10000>;
+               interrupts = <0 37 0x4>; /* Level high type */
+               gpio-controller;
+               little-endian;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpio3: gpio@2330000 {
+               compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+               reg = <0x0 0x2330000 0x0 0x10000>;
+               interrupts = <0 37 0x4>; /* Level high type */
+               gpio-controller;
+               little-endian;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
        usb0: usb3@3100000 {
                compatible = "fsl,layerscape-dwc3";
                reg = <0x0 0x3100000 0x0 0x10000>;