ARM: OMAP5: Add silicon id support for ES2.0 revision.

Adding the CPU detection suport for OMAP5430 and
OMAP5432 ES2.0 SOCs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index dfc0e447e0786aef57d85513460368808d796ad3..8e66a968af5cb4a90893aa49033fa065d7b40dcc 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -204,17 +204,22 @@ void init_omap_revision(void)
         */
        unsigned int rev = cortex_rev();
 
-       switch (rev) {
-       case MIDR_CORTEX_A15_R0P0:
-               switch (readl(CONTROL_ID_CODE)) {
-               case OMAP5430_CONTROL_ID_CODE_ES1_0:
-                       *omap_si_rev = OMAP5430_ES1_0;
-                       break;
-               case OMAP5432_CONTROL_ID_CODE_ES1_0:
-               default:
-                       *omap_si_rev = OMAP5432_ES1_0;
-                       break;
-               }
+       switch (readl(CONTROL_ID_CODE)) {
+       case OMAP5430_CONTROL_ID_CODE_ES1_0:
+               *omap_si_rev = OMAP5430_ES1_0;
+               if (rev == MIDR_CORTEX_A15_R2P2)
+                       *omap_si_rev = OMAP5430_ES2_0;
+               break;
+       case OMAP5432_CONTROL_ID_CODE_ES1_0:
+               *omap_si_rev = OMAP5432_ES1_0;
+               if (rev == MIDR_CORTEX_A15_R2P2)
+                       *omap_si_rev = OMAP5432_ES2_0;
+               break;
+       case OMAP5430_CONTROL_ID_CODE_ES2_0:
+               *omap_si_rev = OMAP5430_ES2_0;
+               break;
+       case OMAP5432_CONTROL_ID_CODE_ES2_0:
+               *omap_si_rev = OMAP5432_ES2_0;
                break;
        default:
                *omap_si_rev = OMAP5430_SILICON_ID_INVALID;

diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 873ccd7df13a4092a0361c7775c02cb4fe6e673f..71935d857972684752c3b987c021c655cb482990 100644 (file)
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -57,7 +57,9 @@
 
 /* To be verified */
 #define OMAP5430_CONTROL_ID_CODE_ES1_0         0x0B94202F
+#define OMAP5430_CONTROL_ID_CODE_ES2_0          0x1B94202F
 #define OMAP5432_CONTROL_ID_CODE_ES1_0         0x0B99802F
+#define OMAP5432_CONTROL_ID_CODE_ES2_0          0x1B99802F
 
 /* STD_FUSE_PROD_ID_1 */
 #define STD_FUSE_PROD_ID_1             (CTRL_BASE + 0x218)

diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index ad9a875de56340d29174a8dc2e3f3faa60dabf71..a73630bc4df3efbe279b0e161307c81c00ac5678 100644 (file)
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -33,6 +33,7 @@
 
 /* Cortex-A15 revisions */
 #define MIDR_CORTEX_A15_R0P0   0x410FC0F0
+#define MIDR_CORTEX_A15_R2P2   0x412FC0F2
 
 /* CCSIDR */
 #define CCSIDR_LINE_SIZE_OFFSET                0

diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 2115687ad71baa3f2513aaa83fadfa696f96a24c..459916785ab0fe0a318fe4a1f0dbdaa2eea0d716 100644 (file)
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -542,4 +542,6 @@ static inline u32 omap_revision(void)
 #define OMAP5430_SILICON_ID_INVALID    0
 #define OMAP5430_ES1_0 0x54300100
 #define OMAP5432_ES1_0 0x54320100
+#define OMAP5430_ES2_0  0x54300200
+#define OMAP5432_ES2_0  0x54320200
 #endif /* _OMAP_COMMON_H_ */