MIPS: allow override of flush_dcache_range()

Useful in custom HW designs which have a need to flush dcache
range in a completely non standard way.

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>

diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 502956d050c845f06091dec62cde51c311274a6d..1a8c87d09437258f7f2ce649646cdfe8be213694 100644 (file)
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -141,7 +141,7 @@ ops_done:
        instruction_hazard_barrier();
 }
 
-void flush_dcache_range(ulong start_addr, ulong stop)
+void __weak flush_dcache_range(ulong start_addr, ulong stop)
 {
        unsigned long lsize = dcache_line_size();
        unsigned long slsize = scache_line_size();