boards with QUICC Engines require OF_QE to set UCC MAC
addresses
- CONFIG_OF_SYSTEM_SETUP
-
- Other code has addition modification that it wants to make
- to the flat device tree before handing it off to the kernel.
- This causes ft_system_setup() to be called before booting
- the kernel.
-
CONFIG_OF_IDE_FIXUP
U-Boot can detect if an IDE device is present or not.
CONFIG_SPL_SKIP_RELOCATE
Avoid SPL relocation
- CONFIG_SPL_NAND_IDENT
- SPL uses the chip ID list to identify the NAND flash.
- Requires CONFIG_SPL_NAND_BASE.
-
CONFIG_SPL_UBI
Support for a lightweight UBI (fastmap) scanner and
loader
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-rsb3720-a1"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_REMAKE_ELF=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_SIGNATURE=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-rsb3720-a1"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_REMAKE_ELF=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_REMAKE_ELF=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_SPL_FIT_PRINT=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_MISC_INIT_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_REMAKE_ELF=y
CONFIG_SYS_LOAD_ADDR=0x43500000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
#define CONFIG_SYS_MONITOR_LEN SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
#define CONFIG_SYS_UBOOT_BASE \
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
/* USDHC */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-/* I2C */
-#define CONFIG_SYS_I2C_SPEED 400000
-
#endif /* __IMX8MN_VAR_SOM_H */
#define CONFIG_SPL_MAX_SIZE (152 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x960000
#define CONFIG_SPL_BSS_START_ADDR 0x0098FC00
#define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#if defined(CONFIG_NAND_BOOT)
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_DMA
#define CONFIG_SPL_NAND_MXS
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_IDENT
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of \
- * first 64MB boot area \
- */
-
-/* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full
- * boot image (not only FIT part) to the mtdpart, so we check both two offsets
- */
-#define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \
- (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400)
-
#endif
#endif
-#define CONFIG_REMAKE_ELF
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_IMX_BOOTAUX
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x20000000
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#endif /* CONFIG_NAND_MXS */
-#define CONFIG_SYS_I2C_SPEED 100000
-
#endif /* __IMX8MP_RSB3720_H */
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_CQSPI_REF_CLK 133333333
-/* HyperFlash related configuration */
-#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
-
/* U-Boot general configuration */
#define EXTRA_ENV_J721S2_BOARD_SETTINGS \
"default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
#define CONFIG_SPL_MAX_SIZE (124 * SZ_1K)
#define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x187FF0
#define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#endif
-#define CONFIG_REMAKE_ELF
-
/* ENET1 Config */
#if defined(CONFIG_CMD_NET)
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_OF_SYSTEM_SETUP
-
#endif
#include "ls1088a_common.h"
-#define CONFIG_SYS_CLK_FREQ 100000000
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x960000
#define CONFIG_SPL_BSS_START_ADDR 0x0098fc00
#define CONFIG_SPL_BSS_MAX_SIZE SZ_1K
#define CONFIG_POWER_PCA9450
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SPEED 100000
#endif /* CONFIG_SPL_BUILD */
-#define CONFIG_REMAKE_ELF
-
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)