]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: mvebu: a38x: serdes: Remove duplicate macro SOC_CTRL_REG
authorPali Rohár <pali@kernel.org>
Fri, 24 Sep 2021 20:59:15 +0000 (22:59 +0200)
committerStefan Roese <sr@denx.de>
Fri, 8 Oct 2021 06:33:52 +0000 (08:33 +0200)
SoC Control 1 Register (offset 0x18204) is already defined by macro
SOC_CONTROL_REG1.

Use macro SOC_CONTROL_REG1 instead of macro SOC_CTRL_REG in ctrl_pex.c
code and remove the other definition.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h

index adef3331a7c5477be958f2ad4f6da15265b832a2..717bcfb29cc1eb238595eaa3c7b16e3dc182def7 100644 (file)
@@ -49,7 +49,7 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
                reg_write(PEX_CAPABILITIES_REG(pex_idx), tmp);
        }
 
-       tmp = reg_read(SOC_CTRL_REG);
+       tmp = reg_read(SOC_CONTROL_REG1);
        tmp &= ~0x03;
 
        for (idx = 0; idx < count; idx++) {
@@ -79,7 +79,7 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
                }
        }
 
-       reg_write(SOC_CTRL_REG, tmp);
+       reg_write(SOC_CONTROL_REG1, tmp);
 
        /* Support gen1/gen2 */
        DEBUG_INIT_FULL_S("Support gen1/gen2\n");
index 3f30b6bf972e1551c0afaac42c617fcfa120402f..a882d2420833c483526582093757c8d538edcb94 100644 (file)
 /* PCI Express Control and Status Registers */
 #define MAX_PEX_BUSSES                 256
 
-#define MISC_REGS_OFFSET               0x18200
-#define MV_MISC_REGS_BASE              MISC_REGS_OFFSET
-#define SOC_CTRL_REG                   (MV_MISC_REGS_BASE + 0x4)
-
 #define PEX_IF_REGS_OFFSET(if)         ((if) > 0 ?                     \
                                         (0x40000 + ((if) - 1) * 0x4000) : \
                                         0x80000)