imx8m: implement armv8_el2_to_aarch32

Add iMX8M specific armv8_el2_to_aarch32 to let AArch64 mode U-Boot
could boot aarch32 mode linux with FIT image as below:

/dts-v1/;

/ {
        description = "Configuration to load ARM32 Linux";

        images {
                kernel@1 {
                        description = "ARM32 Linux kernel";
                        data = /incbin/("./Image");
                        type = "kernel";
                        arch = "arm";
                        os = "linux";
                        compression = "none";
                        load = <0x40008000>;
                        entry = <0x40008000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
                fdt@1 {
                        description = "Flattened Device Tree blob";
                        data = /incbin/("./imx8mm-evk.dtb");
                        type = "flat_dt";
                        arch = "arm";
                        compression = "none";
                        load = <0x43000000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
        };
        configurations {
                default = "config@1";

                config@1 {
                        description = "fsl-imx8mm-evk";
                        kernel = "kernel@1";
                        fdt = "fdt@1";
                };
        };
};

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/mach-imx/imx8m/lowlevel_init.S b/arch/arm/mach-imx/imx8m/lowlevel_init.S
index a4c6466ca9476f7311fea3acb1d965cd95f75536..a49a9cdb35c764c1241d7c3ffbfb96b167ee1d72 100644 (file)
--- a/arch/arm/mach-imx/imx8m/lowlevel_init.S
+++ b/arch/arm/mach-imx/imx8m/lowlevel_init.S
@@ -60,3 +60,15 @@ restore_boot_params:
        ldr     x0, [x0]
        mov     sp, x0
        ret
+
+.global armv8_el2_to_aarch32
+armv8_el2_to_aarch32:
+       cmp     x0, #0
+       bne     0f
+       mov     x3, x2
+       mov     x2, x1
+       mov     x1, x4
+       ldr x0, =0xc20000fd
+0:
+       smc #0
+       ret