]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
timer: add orion-timer support
authorMichael Walle <michael@walle.cc>
Wed, 17 Aug 2022 19:37:51 +0000 (21:37 +0200)
committerStefan Roese <sr@denx.de>
Tue, 23 Aug 2022 10:39:00 +0000 (12:39 +0200)
Add timer support for Kirkwood and MVEBU devices.

Cc: Pali Rohár <pali@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
drivers/timer/Kconfig
drivers/timer/Makefile
drivers/timer/orion-timer.c [new file with mode: 0644]

index 20b5af7e260f6e5fbcbd39c81be994d8b14445e7..404929014810650393093b373af6bb535b56c8e6 100644 (file)
@@ -194,6 +194,12 @@ config OMAP_TIMER
        help
          Select this to enable an timer for Omap devices.
 
+config ORION_TIMER
+       bool "Orion timer support"
+       depends on TIMER
+       help
+         Select this to enable an timer for Orion devices.
+
 config RISCV_TIMER
        bool "RISC-V timer support"
        depends on TIMER && RISCV
index d9822a5370099d0094bac628075c4d10faa3a9da..560e2d27e14f37bbbb2ba92e03d5fb0b5ee7e472 100644 (file)
@@ -17,6 +17,7 @@ obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
 obj-$(CONFIG_NOMADIK_MTU_TIMER)        += nomadik-mtu-timer.o
 obj-$(CONFIG_NPCM_TIMER)        += npcm-timer.o
 obj-$(CONFIG_OMAP_TIMER)       += omap-timer.o
+obj-$(CONFIG_ORION_TIMER)      += orion-timer.o
 obj-$(CONFIG_RENESAS_OSTM_TIMER) += ostm_timer.o
 obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
 obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c
new file mode 100644 (file)
index 0000000..fd30e1b
--- /dev/null
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include <asm/io.h>
+#include <common.h>
+#include <dm/device.h>
+#include <dm/fdtaddr.h>
+#include <timer.h>
+
+#define TIMER_CTRL             0x00
+#define TIMER0_EN              BIT(0)
+#define TIMER0_RELOAD_EN       BIT(1)
+#define TIMER0_RELOAD          0x10
+#define TIMER0_VAL             0x14
+
+struct orion_timer_priv {
+       void *base;
+};
+
+static uint64_t orion_timer_get_count(struct udevice *dev)
+{
+       struct orion_timer_priv *priv = dev_get_priv(dev);
+
+       return ~readl(priv->base + TIMER0_VAL);
+}
+
+static int orion_timer_probe(struct udevice *dev)
+{
+       struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+       struct orion_timer_priv *priv = dev_get_priv(dev);
+
+       priv->base = devfdt_remap_addr_index(dev, 0);
+       if (!priv->base) {
+               debug("unable to map registers\n");
+               return -ENOMEM;
+       }
+
+       uc_priv->clock_rate = CONFIG_SYS_TCLK;
+
+       writel(~0, priv->base + TIMER0_VAL);
+       writel(~0, priv->base + TIMER0_RELOAD);
+
+       /* enable timer */
+       setbits_le32(priv->base + TIMER_CTRL, TIMER0_EN | TIMER0_RELOAD_EN);
+
+       return 0;
+}
+
+static const struct timer_ops orion_timer_ops = {
+       .get_count = orion_timer_get_count,
+};
+
+static const struct udevice_id orion_timer_ids[] = {
+       { .compatible = "marvell,orion-timer" },
+       {}
+};
+
+U_BOOT_DRIVER(orion_timer) = {
+       .name   = "orion_timer",
+       .id     = UCLASS_TIMER,
+       .of_match = orion_timer_ids,
+       .probe = orion_timer_probe,
+       .ops    = &orion_timer_ops,
+       .priv_auto      = sizeof(struct orion_timer_priv),
+};