rockchip: io-domain: add support for PX30

Port the PX30 part of the Rockchip IO Domain driver from Linux.

This differs from linux version in that the io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supplies that have been configured.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c
index 04d4d07c4127e685f72d557d5ac1c89bce70f79c..cf4f7c3984c77787f4e65fa4d6d4c717433c7dce 100644 (file)
--- a/drivers/misc/rockchip-io-domain.c
+++ b/drivers/misc/rockchip-io-domain.c
@@ -27,6 +27,10 @@
 #define MAX_VOLTAGE_1_8                1980000
 #define MAX_VOLTAGE_3_3                3600000
 
+#define PX30_IO_VSEL                   0x180
+#define PX30_IO_VSEL_VCCIO6_SRC                BIT(0)
+#define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM 1
+
 #define RK3328_SOC_CON4                        0x410
 #define RK3328_SOC_CON4_VCCIO2         BIT(7)
 #define RK3328_SOC_VCCIO2_SUPPLY_NUM   1
@@ -99,6 +103,22 @@ static int rockchip_iodomain_write(struct regmap *grf, uint offset, int idx, int
        return regmap_write(grf, offset, val);
 }
 
+static int px30_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
+{
+       int ret = rockchip_iodomain_write(grf, offset, idx, uV);
+
+       if (!ret && idx == PX30_IO_VSEL_VCCIO6_SUPPLY_NUM) {
+               /*
+                * set vccio6 iodomain to also use this framework
+                * instead of a special gpio.
+                */
+               u32 val = PX30_IO_VSEL_VCCIO6_SRC | (PX30_IO_VSEL_VCCIO6_SRC << 16);
+               ret = regmap_write(grf, PX30_IO_VSEL, val);
+       }
+
+       return ret;
+}
+
 static int rk3328_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
 {
        int ret = rockchip_iodomain_write(grf, offset, idx, uV);
@@ -131,6 +151,44 @@ static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, i
        return ret;
 }
 
+static const struct rockchip_iodomain_soc_data soc_data_px30 = {
+       .grf_offset = 0x180,
+       .supply_names = {
+               NULL,
+               "vccio6-supply",
+               "vccio1-supply",
+               "vccio2-supply",
+               "vccio3-supply",
+               "vccio4-supply",
+               "vccio5-supply",
+               "vccio-oscgpi-supply",
+       },
+       .write = px30_iodomain_write,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = {
+       .grf_offset = 0x100,
+       .supply_names = {
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               NULL,
+               "pmuio1-supply",
+               "pmuio2-supply",
+       },
+       .write = rockchip_iodomain_write,
+};
+
 static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {
        .grf_offset = 0x410,
        .supply_names = {
@@ -190,6 +248,14 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = {
 };
 
 static const struct udevice_id rockchip_iodomain_ids[] = {
+       {
+               .compatible = "rockchip,px30-io-voltage-domain",
+               .data = (ulong)&soc_data_px30,
+       },
+       {
+               .compatible = "rockchip,px30-pmu-io-voltage-domain",
+               .data = (ulong)&soc_data_px30_pmu,
+       },
        {
                .compatible = "rockchip,rk3328-io-voltage-domain",
                .data = (ulong)&soc_data_rk3328,