]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: sama7g5: add GMAC0
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Tue, 9 Jun 2020 10:53:00 +0000 (13:53 +0300)
committerEugen Hristev <eugen.hristev@microchip.com>
Thu, 7 Jan 2021 07:44:15 +0000 (09:44 +0200)
Add GMAC0.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
arch/arm/dts/sama7g5.dtsi
arch/arm/dts/sama7g5ek.dts

index 1955dd4a5b3b543fdbf5090d414fe8898d7b17a2..df271a78bf7dfd1ddc3b2e2825b6c4ae87d750ca 100644 (file)
                                clock-names = "usart";
                                status = "disabled";
                        };
+
+                       gmac0: ethernet@e2800000 {
+                               compatible = "cdns,sama7g5-gem";
+                               reg = <0xe2800000 0x4000>;
+                               clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>;
+                               clock-names = "hclk", "pclk", "tx_clk";
+                               assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
+                               assigned-clock-parents = <&pmc PMC_TYPE_CORE 21>; /* eth pll div. */
+                               assigned-clock-rates = <125000000>;
+                               status = "disabled";
+                       };
                };
        };
 };
index a9190bfcb33ab951e0df9b217b5a57cde6712fc4..194f4644b5970c88f821e20a973b5413a638ea52 100644 (file)
        };
 };
 
+&gmac0 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gmac0_default>;
+       phy-mode = "rgmii-id";
+       status = "okay";
+
+       ethernet-phy@7 {
+               reg = <0x7>;
+       };
+};
+
 &pinctrl {
        pinctrl_flx3_default: flx3_default {
                pinmux = <PIN_PD16__FLEXCOM3_IO0>,
                         <PIN_PC4__SDMMC1_CD>;
                bias-pull-up;
        };
+
+       pinctrl_gmac0_default: gmac0_default {
+               pinmux = <PIN_PA16__G0_TX0>,
+                        <PIN_PA17__G0_TX1>,
+                        <PIN_PA26__G0_TX2>,
+                        <PIN_PA27__G0_TX3>,
+                        <PIN_PA19__G0_RX0>,
+                        <PIN_PA20__G0_RX1>,
+                        <PIN_PA28__G0_RX2>,
+                        <PIN_PA29__G0_RX3>,
+                        <PIN_PA15__G0_TXEN>,
+                        <PIN_PA24__G0_TXCK>,
+                        <PIN_PA30__G0_RXCK>,
+                        <PIN_PA18__G0_RXDV>,
+                        <PIN_PA22__G0_MDC>,
+                        <PIN_PA23__G0_MDIO>,
+                        <PIN_PA25__G0_125CK>;
+               bias-disable;
+       };
 };