pci: Remove guard around compatibility functions

This prevents use of IS_ENABLED() in other files. Functions should be
visible in headers even if they are not available at link time.

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/include/pci.h b/include/pci.h
index 258c8f831ceeb08fa41703cb707f48e151aabbca..fed829727cea5f83bf68044a0fb4d04b89acadc2 100644 (file)
--- a/include/pci.h
+++ b/include/pci.h
@@ -840,7 +840,6 @@ extern void pci_mpc85xx_init (struct pci_controller *hose);
 extern void imx_pcie_remove(void);
 #endif
 
-#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
 /**
  * pci_write_bar32() - Write the address of a BAR including control bits
  *
@@ -848,6 +847,8 @@ extern void imx_pcie_remove(void);
  * with devices which require hard-coded addresses, not part of the normal
  * PCI enumeration process.
  *
+ * This is only available if CONFIG_DM_PCI_COMPAT is enabled
+ *
  * @hose:      PCI hose to use
  * @dev:       PCI device to update
  * @barnum:    BAR number (0-5)
@@ -859,6 +860,8 @@ void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
 /**
  * pci_read_bar32() - read the address of a bar
  *
+ * This is only available if CONFIG_DM_PCI_COMPAT is enabled
+ *
  * @hose:      PCI hose to use
  * @dev:       PCI device to inspect
  * @barnum:    BAR number (0-5)
@@ -869,6 +872,8 @@ u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum);
 /**
  * pci_hose_find_devices() - Find devices by vendor/device ID
  *
+ * This is only available if CONFIG_DM_PCI_COMPAT is enabled
+ *
  * @hose:      PCI hose to search
  * @busnum:    Bus number to search
  * @ids:       PCI vendor/device IDs to look for, terminated by 0, 0 record
@@ -879,7 +884,6 @@ u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum);
  */
 pci_dev_t pci_hose_find_devices(struct pci_controller *hose, int busnum,
                                struct pci_device_id *ids, int *indexp);
-#endif /* !CONFIG_DM_PCI || CONFIG_DM_PCI_COMPAT */
 
 /* Access sizes for PCI reads and writes */
 enum pci_size_t {