powerpc/85xx: introduce SET_PCI_LIODN_BASE, for setting PCI LIODNs

The liodn for the new PCIE controller included in P5040DS is no longer set
through a register in the guts register block but with one in the PCIE
register block itself.  Update the PCIE CCSR structure to add the new liodn
register and add a new dedicated SET_PCI_LIODN_BASE macro that puts
the liodn in the correct register.

Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h
index a9973b80da5c0d1a2980a4f14e807da3782823f1..a37983ee541973cb95cd484271286bc2463d255c 100644 (file)
--- a/arch/powerpc/include/asm/fsl_liodn.h
+++ b/arch/powerpc/include/asm/fsl_liodn.h
@@ -94,6 +94,11 @@ extern void fdt_fixup_liodn(void *blob);
        SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
                CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
 
+#define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \
+       SET_LIODN_ENTRY_1(compat, liodn,\
+               offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
+               CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
+
 /* reg nodes for DMA start @ 0x300 */
 #define SET_DMA_LIODN(dmaNum, liodn) \
        SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 7de33a7dded0f980672bbff09ad4a99d72af9e6b..6c11178f0f46a3787198850113da65f4748c280d 100644 (file)
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -296,7 +296,9 @@ typedef struct ccsr_pcix {
        u32     cfg_addr;       /* PCIX Configuration Addr */
        u32     cfg_data;       /* PCIX Configuration Data */
        u32     int_ack;        /* PCIX IRQ Acknowledge */
-       u8      res1[3060];
+       u8      res000c[52];
+       u32     liodn_base;     /* PCIX LIODN base register */
+       u8      res0044[3004];
        u32     potar0;         /* PCIX Outbound Transaction Addr 0 */
        u32     potear0;        /* PCIX Outbound Translation Extended Addr 0 */
        u32     powbar0;        /* PCIX Outbound Window Base Addr 0 */