board: ls1043ardb: fdt fixups for revision v7.0 boards

The LS1043ARDB rev v7.0 board replaces the AQR105 PHY on MAC9 with an
AQR113C PHY. The address of the PHY on the MDIO bus changes from 0x1 to
0x8. Enable CONFIG_OF_BOARD_FIXUP and update both u-boot and Linux device
trees to reflect this change.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>

diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 002869f43526ef2118d89f76f66c35fcba677c3a..f388eb496f4734a2b2bca22de40e05585c1130e4 100644 (file)
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2015 Freescale Semiconductor, Inc.
- * Copyright 2021 NXP
+ * Copyright 2021-2022 NXP
  */
 
 #include <common.h>
@@ -272,6 +272,39 @@ void fdt_del_qe(void *blob)
        }
 }
 
+/* Update the address of the Aquantia PHY on the MDIO bus for boards revision
+ * v7.0 and up. Also rename the PHY node to align with the address change.
+ */
+void fdt_fixup_phy_addr(void *blob)
+{
+       const char phy_path[] =
+               "/soc/fman@1a00000/mdio@fd000/ethernet-phy@1";
+       int ret, offset, new_addr = AQR113C_PHY_ADDR;
+       char new_name[] = "ethernet-phy@00";
+
+       if (CPLD_READ(pcba_ver) < 0x7)
+               return;
+
+       offset = fdt_path_offset(blob, phy_path);
+       if (offset < 0) {
+               printf("ethernet-phy@1 node not found in the dts\n");
+               return;
+       }
+
+       ret = fdt_setprop_u32(blob, offset, "reg", new_addr);
+       if (ret < 0) {
+               printf("Unable to set 'reg' for node ethernet-phy@1: %s\n",
+                      fdt_strerror(ret));
+               return;
+       }
+
+       sprintf(new_name, "ethernet-phy@%x", new_addr);
+       ret = fdt_set_name(blob, offset, new_name);
+       if (ret < 0)
+               printf("Unable to rename node ethernet-phy@1: %s\n",
+                      fdt_strerror(ret));
+}
+
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
        u64 base[CONFIG_NR_DRAM_BANKS];
@@ -290,6 +323,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 #ifndef CONFIG_DM_ETH
        fdt_fixup_fman_ethernet(blob);
 #endif
+       fdt_fixup_phy_addr(blob);
 #endif
 
        fdt_fixup_icid(blob);
@@ -313,6 +347,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
        return 0;
 }
 
+#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
+int board_fix_fdt(void *blob)
+{
+       fdt_fixup_phy_addr(blob);
+       return 0;
+}
+#endif
+
 u8 flash_read8(void *addr)
 {
        return __raw_readb(addr + 1);

diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 0a40bf0f9f994eed039e90e308e0182a94f17a77..cc067565dc85948a21eea986b7f31ed13dd44f05 100644 (file)
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -12,6 +12,7 @@ CONFIG_SYS_I2C_MXC_I2C4=y
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_FSL_LS_PPA=y
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_NXP_ESBC=y
 CONFIG_LAYERSCAPE_NS_ACCESS=y
 CONFIG_PCIE1=y

diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index f27eadf3921140d5447c2455c8841b22080e179d..7b6080ec8016c1012015dc5b1295a738ce678d48 100644 (file)
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_FSL_LS_PPA=y
 CONFIG_ENV_ADDR=0x60300000
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_LAYERSCAPE_NS_ACCESS=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index da23382940f8694c52f909c02ada4b8ca23c7f24..83474072b4fded20f7bfc71d9cef4fcc11b7b6ee 100644 (file)
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -14,6 +14,7 @@ CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_NXP_ESBC=y
 CONFIG_LAYERSCAPE_NS_ACCESS=y
 CONFIG_PCIE1=y

diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index 2be08bbb7b354baefa640c65d8b293045920332d..5402fbb4a76dd2b65a92b7c29268117bb4b74496 100644 (file)
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -19,6 +19,7 @@ CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_LAYERSCAPE_NS_ACCESS=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index d9b841df1a4eca7fd1555d21cce926fe697f2dea..baac67f6448a2a757c5ff1df2b4582cafc419d3b 100644 (file)
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -15,6 +15,7 @@ CONFIG_SPL_MMC=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_NXP_ESBC=y
 CONFIG_LAYERSCAPE_NS_ACCESS=y
 CONFIG_PCIE1=y

diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index 79feb55dfb15f18b40afeafa88b54ba8094de7dd..ee9b886b190ea3ce15d6b15e4e8c449f6172846a 100644 (file)
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -20,6 +20,7 @@ CONFIG_SPL_MMC=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_LAYERSCAPE_NS_ACCESS=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
index 3aafd103df3841a4dbd797004c214d7366096a27..1adf26547bb6f9ef1df8db603e040c87226c1ada 100644 (file)
--- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
 CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_NXP_ESBC=y
 CONFIG_LAYERSCAPE_NS_ACCESS=y
 CONFIG_PCIE1=y

diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index f9cb304ba1cc51d5cdc395a985ef2a1c7a64f2a3..78a383be3bb2d7d67e2f41542a518a25fcd19363 100644 (file)
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
 CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
 CONFIG_ENV_ADDR=0x60500000
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_LAYERSCAPE_NS_ACCESS=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index d36b2c7e557b2825b019276b436a1d37fec96eb4..ff5da5d2754525b2f80075fc5eafcd1e842658a4 100644 (file)
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2015 Freescale Semiconductor
+ * Copyright 2022 NXP
  */
 
 #ifndef __LS1043ARDB_H__
@@ -206,7 +207,9 @@
 #define QSGMII_PORT3_PHY_ADDR          0x6
 #define QSGMII_PORT4_PHY_ADDR          0x7
 
-#define FM1_10GEC1_PHY_ADDR            0x1
+/* The AQR PHY model and MDIO address differ between board revisions */
+#define FM1_10GEC1_PHY_ADDR            0x1 /* AQR105 on boards up to v6.0 */
+#define AQR113C_PHY_ADDR               0x8 /* AQR113C on boards v7.0 and up */
 #endif
 #endif