ARM: socfpga: Make DRAM node available in SPL

The SPL can also parse the DRAM configuration node to figure out the
memory layout, make sure it is available.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm/dts/socfpga_arria10_socdk.dtsi b/arch/arm/dts/socfpga_arria10_socdk.dtsi
index d7616dd1c51d5286082ed5ff3c7705ac7733e436..3f59f0257753a38af1235014c0265a396a974a5b 100644 (file)
--- a/arch/arm/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/dts/socfpga_arria10_socdk.dtsi
@@ -34,6 +34,7 @@
                name = "memory";
                device_type = "memory";
                reg = <0x0 0x40000000>; /* 1GB */
+               u-boot,dm-pre-reloc;
        };
 
        a10leds {