]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
x86: Update .dtsi file for FSP2
authorSimon Glass <sjg@chromium.org>
Sat, 7 Dec 2019 04:42:28 +0000 (21:42 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Sun, 15 Dec 2019 03:44:19 +0000 (11:44 +0800)
Include the IFWI section and the FSP-M binary. The FSP-T binary is not
currently used, as CAR is set up manually.

Also drop the FSP binary as this relates only to FSP1.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/dts/u-boot.dtsi

index 850fe3ac11ae72dae3bcab8de791afed3f1495d0..14e3c13072c6abb1eb0263c5e3dff2fa7e30134b 100644 (file)
                offset = <CONFIG_X86_MRC_ADDR>;
        };
 #endif
-#ifdef CONFIG_HAVE_FSP
+#ifdef CONFIG_FSP_VERSION1
        intel-fsp {
                filename = CONFIG_FSP_FILE;
                offset = <CONFIG_FSP_ADDR>;
        };
 #endif
+#ifdef CONFIG_FSP_VERSION2
+       intel-descriptor {
+               filename = CONFIG_FLASH_DESCRIPTOR_FILE;
+       };
+       intel-ifwi {
+               filename = CONFIG_IFWI_INPUT_FILE;
+               convert-fit;
+
+               section {
+                       size = <0x8000>;
+                       ifwi-replace;
+                       ifwi-subpart = "IBBP";
+                       ifwi-entry = "IBBL";
+                       u-boot-tpl {
+                       };
+                       x86-start16-tpl {
+                               offset = <0x7800>;
+                       };
+                       x86-reset16-tpl {
+                               offset = <0x7ff0>;
+                       };
+               };
+       };
+       intel-fsp-m {
+               filename = CONFIG_FSP_FILE_M;
+       };
+       intel-fsp-s {
+               filename = CONFIG_FSP_FILE_S;
+       };
+#endif
 #ifdef CONFIG_HAVE_CMC
        intel-cmc {
                filename = CONFIG_CMC_FILE;