ARM: dts: imxrt1020-evk: move all u-boot, dm-spl to imxrt1020-evk-u-boot.dtsi file

At the moment a lot of u-boot,dm-spl properties are present in board .dts
file but this is not correct since u-boot,dm-spl property is u-boot
specific and must be listed into the separate imrt1020-evk-u-boot.dtsi
file. So let's move every u-boot,dm-spl property present in
imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>

diff --git a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi
index 34d19e06c5fe4f576c2863a9a5508b8552421169..121665a2d226bee3f4bc5b74abd18ad2575a5b30 100644 (file)
--- a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi
+++ b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi
@@ -8,6 +8,38 @@
        chosen {
                u-boot,dm-spl;
        };
+
+       clocks {
+               u-boot,dm-spl;
+       };
+
+       soc {
+               u-boot,dm-spl;
+       };
+};
+
+&osc {
+       u-boot,dm-spl;
+};
+
+&clks {
+       u-boot,dm-spl;
+};
+
+&gpio1 {
+       u-boot,dm-spl;
+};
+
+&gpio2 {
+       u-boot,dm-spl;
+};
+
+&gpio3 {
+       u-boot,dm-spl;
+};
+
+&gpio5 {
+       u-boot,dm-spl;
 };
 
 &gpt1 {
@@ -19,6 +51,8 @@
 };
 
 &semc {
+       u-boot,dm-spl;
+
        bank1: bank@0 {
                u-boot,dm-spl;
        };

diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi
index cab608c644c2cb30b45f41ced2a7670aa35b4619..884d57f61401bd9923991adae37b1acadd17db35 100644 (file)
--- a/arch/arm/dts/imxrt1020.dtsi
+++ b/arch/arm/dts/imxrt1020.dtsi
@@ -23,7 +23,6 @@
        };
 
        clocks {
-               u-boot,dm-spl;
                ckil {
                        compatible = "fsl,imx-ckil", "fixed-clock";
                        #clock-cells = <0>;
@@ -37,7 +36,6 @@
                };
 
                osc: osc {
-                       u-boot,dm-spl;
                        compatible = "fsl,imx-osc", "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <24000000>;
@@ -45,10 +43,7 @@
        };
 
        soc {
-               u-boot,dm-spl;
-
                semc: semc@402f0000 {
-                       u-boot,dm-spl;
                        compatible = "fsl,imxrt-semc";
                        reg = <0x402f0000 0x4000>;
                        clocks = <&clks IMXRT1020_CLK_SEMC>;
@@ -73,7 +68,6 @@
                };
 
                clks: ccm@400fc000 {
-                       u-boot,dm-spl;
                        compatible = "fsl,imxrt1020-ccm";
                        reg = <0x400fc000 0x4000>;
                        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
@@ -82,7 +76,6 @@
                };
 
                usdhc1: usdhc@402c0000 {
-                       u-boot,dm-spl;
                        compatible = "fsl,imxrt-usdhc";
                        reg = <0x402c0000 0x10000>;
                        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
@@ -95,7 +88,6 @@
                };
 
                gpio1: gpio@401b8000 {
-                       u-boot,dm-spl;
                        compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
                        reg = <0x401b8000 0x4000>;
                        interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
@@ -107,7 +99,6 @@
                };
 
                gpio2: gpio@401bc000 {
-                       u-boot,dm-spl;
                        compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
                        reg = <0x401bc000 0x4000>;
                        interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
@@ -119,7 +110,6 @@
                };
 
                gpio3: gpio@401c0000 {
-                       u-boot,dm-spl;
                        compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
                        reg = <0x401c0000 0x4000>;
                        interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,