ARM: mvebu: a38x: use non-zero size for ddr scrubbing

Make ddr3_calc_mem_cs_size() global scope and use it in
ddr3_new_tip_ecc_scrub to correctly initialize all of DDR memory.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.c b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
index 2070bb38b099a151115cb15400461d0ee26dbc71..2f318cb9ea7bbd9e4d772d0b0d5ab711da11f8e2 100644 (file)
--- a/drivers/ddr/marvell/a38x/mv_ddr_plat.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
@@ -995,7 +995,7 @@ static u32 ddr3_get_device_size(u32 cs)
        }
 }
 
-static int ddr3_calc_mem_cs_size(u32 cs, uint64_t *cs_size)
+int ddr3_calc_mem_cs_size(u32 cs, uint64_t *cs_size)
 {
        u32 cs_mem_size;
 

diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.h b/drivers/ddr/marvell/a38x/mv_ddr_plat.h
index 61f10302fccaa086df0ce872a590769b4a61f8b0..9c5fdecd9341e05b848079a52e81ee8032cb8e39 100644 (file)
--- a/drivers/ddr/marvell/a38x/mv_ddr_plat.h
+++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.h
@@ -232,4 +232,5 @@ u32 mv_ddr_dm_pad_get(void);
 int mv_ddr_pre_training_fixup(void);
 int mv_ddr_post_training_fixup(void);
 int mv_ddr_manual_cal_do(void);
+int ddr3_calc_mem_cs_size(u32 cs, uint64_t *cs_size);
 #endif /* _MV_DDR_PLAT_H */

diff --git a/drivers/ddr/marvell/a38x/xor.c b/drivers/ddr/marvell/a38x/xor.c
index 024cecd777c5a5d06cc2328d0b82b68fb5fc453b..f859596d8953227165f840e4dfd6b26c1c845ab1 100644 (file)
--- a/drivers/ddr/marvell/a38x/xor.c
+++ b/drivers/ddr/marvell/a38x/xor.c
@@ -347,6 +347,9 @@ void ddr3_new_tip_ecc_scrub(void)
        for (cs_c = 0; cs_c < max_cs; cs_c++)
                cs_ena |= 1 << cs_c;
 
+       /* assume that all CS have same size */
+       ddr3_calc_mem_cs_size(0, &cs_mem_size);
+
        mv_sys_xor_init(max_cs, cs_ena, cs_mem_size, 0);
        total_mem_size = max_cs * cs_mem_size;
        mv_xor_mem_init(0, 0, total_mem_size, 0xdeadbeef, 0xdeadbeef);