Exynos5422/5800: set cpu id to 0x5422

The proper CPU ID for those Exynos variants is 0x5422,
but before the 0x5800 was set. This commit fix this back.

Changes:
- set cpu id to 0x5422 instead of 0x5800
- remove macro proid_is_exynos5800()
- add macro proid_is_exynos5422()
- change the calls to proid_is_exynos5800() with new macro

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 18eadf545fa94926a324b53637e5e96d23e2e702..3d31f9d524909716ee3785139614d4d80366aefa 100644 (file)
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -159,8 +159,8 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
                        div = PLL_DIV_1024;
                else if (proid_is_exynos4412())
                        div = PLL_DIV_65535;
-               else if (proid_is_exynos5250() || proid_is_exynos5420()
-                        || proid_is_exynos5800())
+               else if (proid_is_exynos5250() || proid_is_exynos5420() ||
+                        proid_is_exynos5422())
                        div = PLL_DIV_65536;
                else
                        return 0;
@@ -346,7 +346,7 @@ static struct clk_bit_info *get_clk_bit_info(int peripheral)
        int i;
        struct clk_bit_info *info;
 
-       if (proid_is_exynos5420() || proid_is_exynos5800())
+       if (proid_is_exynos5420() || proid_is_exynos5422())
                info = exynos542x_bit_info;
        else
                info = exynos5_bit_info;
@@ -558,7 +558,7 @@ static unsigned long exynos542x_get_periph_rate(int peripheral)
 unsigned long clock_get_periph_rate(int peripheral)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420() || proid_is_exynos5800())
+               if (proid_is_exynos5420() || proid_is_exynos5422())
                        return exynos542x_get_periph_rate(peripheral);
                return exynos5_get_periph_rate(peripheral);
        } else {
@@ -1576,7 +1576,7 @@ static unsigned long exynos4_get_i2c_clk(void)
 unsigned long get_pll_clk(int pllreg)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420() || proid_is_exynos5800())
+               if (proid_is_exynos5420() || proid_is_exynos5422())
                        return exynos542x_get_pll_clk(pllreg);
                return exynos5_get_pll_clk(pllreg);
        } else if (cpu_is_exynos4()) {
@@ -1692,7 +1692,7 @@ void set_mmc_clk(int dev_index, unsigned int div)
                div -= 1;
 
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420() || proid_is_exynos5800())
+               if (proid_is_exynos5420() || proid_is_exynos5422())
                        exynos5420_set_mmc_clk(dev_index, div);
                else
                        exynos5_set_mmc_clk(dev_index, div);
@@ -1708,7 +1708,7 @@ unsigned long get_lcd_clk(void)
        } else if (cpu_is_exynos5()) {
                if (proid_is_exynos5420())
                        return exynos5420_get_lcd_clk();
-               else if (proid_is_exynos5800())
+               else if (proid_is_exynos5422())
                        return exynos5800_get_lcd_clk();
                else
                        return exynos5_get_lcd_clk();
@@ -1740,7 +1740,7 @@ void set_mipi_clk(void)
 int set_spi_clk(int periph_id, unsigned int rate)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420() || proid_is_exynos5800())
+               if (proid_is_exynos5420() || proid_is_exynos5422())
                        return exynos5420_set_spi_clk(periph_id, rate);
                return exynos5_set_spi_clk(periph_id, rate);
        }

diff --git a/arch/arm/mach-exynos/clock_init_exynos5.c b/arch/arm/mach-exynos/clock_init_exynos5.c
index 0200fd154f9491eb974873db7ec4b0e061dae515..1b7498d9d5f6fc113191178322cd4702210a943a 100644 (file)
--- a/arch/arm/mach-exynos/clock_init_exynos5.c
+++ b/arch/arm/mach-exynos/clock_init_exynos5.c
@@ -971,7 +971,7 @@ static void exynos5420_system_clock_init(void)
 
 void system_clock_init(void)
 {
-       if (proid_is_exynos5420() || proid_is_exynos5800())
+       if (proid_is_exynos5420() || proid_is_exynos5422())
                exynos5420_system_clock_init();
        else
                exynos5250_system_clock_init();

diff --git a/arch/arm/mach-exynos/common_setup.h b/arch/arm/mach-exynos/common_setup.h
index 67aac2d57517b5988c637798ee739509cb796847..2829fb269edae48d1fa1891d629059c88fb16db4 100644 (file)
--- a/arch/arm/mach-exynos/common_setup.h
+++ b/arch/arm/mach-exynos/common_setup.h
@@ -78,7 +78,7 @@ static inline void configure_l2_ctlr(void)
                CACHE_TAG_RAM_LATENCY_2_CYCLES |
                CACHE_DATA_RAM_LATENCY_2_CYCLES;
 
-       if (proid_is_exynos5420() || proid_is_exynos5800()) {
+       if (proid_is_exynos5420() || proid_is_exynos5422()) {
                val |= CACHE_ECC_AND_PARITY |
                        CACHE_TAG_RAM_LATENCY_3_CYCLES |
                        CACHE_DATA_RAM_LATENCY_3_CYCLES;
@@ -97,7 +97,7 @@ static inline void configure_l2_actlr(void)
 {
        uint32_t val;
 
-       if (proid_is_exynos5420() || proid_is_exynos5800()) {
+       if (proid_is_exynos5420() || proid_is_exynos5422()) {
                mrc_l2_aux_ctlr(val);
                val |= CACHE_ENABLE_FORCE_L2_LOGIC |
                        CACHE_DISABLE_CLEAN_EVICT;

diff --git a/arch/arm/mach-exynos/include/mach/cpu.h b/arch/arm/mach-exynos/include/mach/cpu.h
index cb3d2cc06fc4e3956e2857af2f9c54d723c33358..14a1692467de9a0a8c407b1019c2a4dd05ee5646 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/cpu.h
+++ b/arch/arm/mach-exynos/include/mach/cpu.h
@@ -237,7 +237,7 @@ static inline void s5p_set_cpu_id(void)
                 * Exynos5800 is a variant of Exynos5420
                 * and has product id 0x5422
                 */
-               s5p_cpu_id = 0x5800;
+               s5p_cpu_id = 0x5422;
                break;
        }
 }
@@ -267,7 +267,7 @@ IS_EXYNOS_TYPE(exynos4210, 0x4210)
 IS_EXYNOS_TYPE(exynos4412, 0x4412)
 IS_EXYNOS_TYPE(exynos5250, 0x5250)
 IS_EXYNOS_TYPE(exynos5420, 0x5420)
-IS_EXYNOS_TYPE(exynos5800, 0x5800)
+IS_EXYNOS_TYPE(exynos5422, 0x5422)
 
 #define SAMSUNG_BASE(device, base)                             \
 static inline unsigned int __attribute__((no_instrument_function)) \
@@ -278,7 +278,7 @@ static inline unsigned int __attribute__((no_instrument_function)) \
                        return EXYNOS4X12_##base;               \
                return EXYNOS4_##base;                          \
        } else if (cpu_is_exynos5()) {                          \
-               if (proid_is_exynos5420() || proid_is_exynos5800())     \
+               if (proid_is_exynos5420() || proid_is_exynos5422())     \
                        return EXYNOS5420_##base;               \
                return EXYNOS5_##base;                          \
        }                                                       \

diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h
index 9699954a7d452c1d0979e8675a9094d658747066..7fc8e61f9ca8e9b070f2d120e1dd3960f1566600 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -1398,7 +1398,7 @@ static struct gpio_info exynos5420_gpio_data[EXYNOS5420_GPIO_NUM_PARTS] = {
 static inline struct gpio_info *get_gpio_data(void)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420() || proid_is_exynos5800())
+               if (proid_is_exynos5420() || proid_is_exynos5422())
                        return exynos5420_gpio_data;
                else
                        return exynos5_gpio_data;
@@ -1415,7 +1415,7 @@ static inline struct gpio_info *get_gpio_data(void)
 static inline unsigned int get_bank_num(void)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420() || proid_is_exynos5800())
+               if (proid_is_exynos5420() || proid_is_exynos5422())
                        return EXYNOS5420_GPIO_NUM_PARTS;
                else
                        return EXYNOS5_GPIO_NUM_PARTS;

diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c
index 179b29449e6f520a31f37c474d30e4d8d528c0ba..a556e4afc7add8e9203b649a56e25bb6221cb425 100644 (file)
--- a/arch/arm/mach-exynos/pinmux.c
+++ b/arch/arm/mach-exynos/pinmux.c
@@ -858,7 +858,7 @@ static int exynos4x12_pinmux_config(int peripheral, int flags)
 int exynos_pinmux_config(int peripheral, int flags)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420() || proid_is_exynos5800())
+               if (proid_is_exynos5420() || proid_is_exynos5422())
                        return exynos5420_pinmux_config(peripheral, flags);
                else if (proid_is_exynos5250())
                        return exynos5_pinmux_config(peripheral, flags);

diff --git a/arch/arm/mach-exynos/power.c b/arch/arm/mach-exynos/power.c
index 1b12051656e26405667e21aa65e499a559eba23c..cd2d6618ac89b74a15aec2748aa6c6fe40f1af9a 100644 (file)
--- a/arch/arm/mach-exynos/power.c
+++ b/arch/arm/mach-exynos/power.c
@@ -125,7 +125,7 @@ static void exynos5420_set_usbdev_phy_ctrl(unsigned int enable)
 void set_usbdrd_phy_ctrl(unsigned int enable)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420() || proid_is_exynos5800())
+               if (proid_is_exynos5420() || proid_is_exynos5422())
                        exynos5420_set_usbdev_phy_ctrl(enable);
                else
                        exynos5_set_usbdrd_phy_ctrl(enable);