sunxi: add support for R_I2C on H616

This port is needed for communication with PMIC. SPL uses it to set DRAM
voltage on H616 boards.

Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index cdb7dbd5b8e57246f427ab46699af8300bfae50a..de77bf638e21bfa977726a273ca01e390c420c4e 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -220,6 +220,7 @@ enum sunxi_gpio_number {
 #define SUN8I_A23_GPL_R_TWI    3
 #define SUN8I_GPL_R_UART       2
 #define SUN50I_GPL_R_TWI       2
+#define SUN50I_H616_GPL_R_TWI  3
 
 #define SUN9I_GPN_R_RSB                3
 

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 841a9ec3d40149fc749608240ec65b655d6d2867..e42b61e9068a9887324682be4a3a979a09254af2 100644 (file)
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -197,6 +197,10 @@ void i2c_init_board(void)
        clock_twi_onoff(5, 1);
        sunxi_gpio_set_cfgpin(SUNXI_GPL(8), SUN50I_GPL_R_TWI);
        sunxi_gpio_set_cfgpin(SUNXI_GPL(9), SUN50I_GPL_R_TWI);
+#elif CONFIG_MACH_SUN50I_H616
+       clock_twi_onoff(5, 1);
+       sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN50I_H616_GPL_R_TWI);
+       sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN50I_H616_GPL_R_TWI);
 #else
        clock_twi_onoff(5, 1);
        sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);