]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm64: zynqmp: Add 'silabs, skip-recall' to all si570 clk nodes
authorSaeed Nowshadi <saeed.nowshadi@amd.com>
Thu, 25 Jan 2024 08:07:58 +0000 (09:07 +0100)
committerMichal Simek <michal.simek@amd.com>
Mon, 12 Feb 2024 08:28:32 +0000 (09:28 +0100)
Without 'silabs,skip-recall' property, the driver on System Controller
re-calibrates the output clock frequency at probe() time based on the NVRAM
setting.  This re-calibration causes a glitch on the output clock.  At
power-on, Versal is also booting and expecting a glitch-free clock for
its correct operation.  System Controller should skip the re-calibration
step to prevent any clock instability for Versal.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bbb2322c94503f0e6b369c60312b7546500fad95.1706170068.git.michal.simek@amd.com
arch/arm/dts/zynqmp-e-a2197-00-revA.dts

index f1b0a4aa65dd630d8fd1d11aa72e600397a182ff..0b97fa3f28ac598a436ad1a38940f659d3fd8716 100644 (file)
                                factory-fout = <156250000>;
                                clock-frequency = <156250000>;
                                clock-output-names = "si570_zsfp_clk";
+                               silabs,skip-recall;
                        };
                };
                i2c@6 { /* USER_SI570_1 */
                                factory-fout = <100000000>;
                                clock-frequency = <100000000>;
                                clock-output-names = "si570_user1";
+                               silabs,skip-recall;
                        };
 
                };
                                factory-fout = <200000000>;
                                clock-frequency = <200000000>;
                                clock-output-names = "si570_lpddr4_clk2";
+                               silabs,skip-recall;
                        };
                };
                i2c@5 { /* LPDDR4_SI570_CLK1 */
                                factory-fout = <200000000>;
                                clock-frequency = <200000000>;
                                clock-output-names = "si570_lpddr4_clk1";
+                               silabs,skip-recall;
                        };
                };
                i2c@6 { /* HSDP_SI570 */
                                factory-fout = <156250000>;
                                clock-frequency = <156250000>;
                                clock-output-names = "si570_hsdp_clk";
+                               silabs,skip-recall;
                        };
                };
                i2c@7 { /* 8A34001 - U219B and J310 connector */