]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
WS cleanup: remove excessive empty lines
authorWolfgang Denk <wd@denx.de>
Mon, 27 Sep 2021 15:42:37 +0000 (17:42 +0200)
committerTom Rini <trini@konsulko.com>
Thu, 30 Sep 2021 12:08:56 +0000 (08:08 -0400)
Signed-off-by: Wolfgang Denk <wd@denx.de>
27 files changed:
README
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
arch/xtensa/include/asm/arch-dc232b/core.h
arch/xtensa/include/asm/arch-dc232b/tie-asm.h
arch/xtensa/include/asm/arch-dc233c/core.h
arch/xtensa/include/asm/arch-dc233c/tie-asm.h
arch/xtensa/include/asm/arch-de212/core.h
arch/xtensa/include/asm/cacheasm.h
board/freescale/ls1088a/ddr.c
board/freescale/t208xqds/README
board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c
board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
cmd/bedbug.c
doc/README.dfutftp
doc/device-tree-bindings/firmware/linaro,optee-tz.txt
drivers/gpio/hi6220_gpio.c
drivers/i2c/mxc_i2c.c
drivers/mtd/nand/raw/nand_util.c
drivers/net/e1000.c
drivers/video/stb_truetype.h
fs/btrfs/kernel-shared/btrfs_tree.h
include/configs/etamin.h
include/fsl-mc/fsl_dpni.h
include/linux/mtd/flashchip.h
include/linux/serial_reg.h

diff --git a/README b/README
index 1ef8010724b52b89150c4bc01594d4b3ad4daf63..28eb92035959eec69f65a6206bac248799c15cd5 100644 (file)
--- a/README
+++ b/README
@@ -300,7 +300,6 @@ board_init_r():
        - loads U-Boot or (in falcon mode) Linux
 
 
-
 Configuration Options:
 ----------------------
 
index 3b41c7d49b729a23d75785a6e535136b4dcdbae8..bb7d24b4b7ba586bcd7420085d85c1fc3ce0fa10 100644 (file)
@@ -14,8 +14,6 @@
 #include "sys_env_lib.h"
 #include "ctrl_pex.h"
 
-
-
 /*
  * serdes_seq_db - holds all serdes sequences, their size and the
  * relevant index in the data array initialized in serdes_seq_init
index 92ea0dfe35efa4d6ed76bfc8e88ae901ac5348c5..c1453f719e44e6db35817687cc927248aa93e207 100644 (file)
 #define XCHAL_DCACHE_IS_WRITEBACK      1       /* writeback feature */
 
 
-
-
 /****************************************************************************
     Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
  ****************************************************************************/
index 7003cad40d06792c5a0ad2df6b79b5fc4a6b0835..35a26dca7cc39316fe4f78ef496ec8d25aaaef55 100644 (file)
@@ -26,7 +26,6 @@
 #define XTHAL_SAS_ALL  0xFFFF  /* include all default NCP contents */
 
 
-
 /* Macro to save all non-coprocessor (extra) custom TIE and optional state
  * (not including zero-overhead loop registers).
  * Save area ptr (clobbered):  ptr  (1 byte aligned)
        .endif
        .endm   // xchal_ncp_load
 
-
-
 #define XCHAL_NCP_NUM_ATMPS    2
 
-
 #define XCHAL_SA_NUM_ATMPS     2
 
 #endif /*_XTENSA_CORE_TIE_ASM_H*/
index ca07d8ee21ad1ae012ab7cc618f2467d98eaf483..4646cdbfb46cde80face9ea8f52617920b7e1083 100644 (file)
 #define XCHAL_HAVE_PREFETCH            0       /* PREFCTL register */
 
 
-
-
 /****************************************************************************
     Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
  ****************************************************************************/
 
-
 #ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
 
 /*----------------------------------------------------------------------
index 317d4e13126819f71858ae408598946b5233077f..7b3d1f3c57251a12846ebafe9c20f81aab10b738 100644 (file)
@@ -31,8 +31,6 @@
                                        | ((ccuse) & XTHAL_SAS_ANYCC)  \
                                        | ((abi)   & XTHAL_SAS_ANYABI) )
 
-
-
     /*
      *  Macro to save all non-coprocessor (extra) custom TIE and optional state
      *  (not including zero-overhead loop registers).
 
 #define XCHAL_NCP_NUM_ATMPS    1
 
-
-
 #define XCHAL_SA_NUM_ATMPS     1
 
 #endif /*_XTENSA_CORE_TIE_ASM_H*/
index 7268692d0e849c5805a2ee5c525a7c13dc8da868..443fd459ca67c2b1a798ef9ba98794e20a72dd84 100644 (file)
 #define XCHAL_HAVE_DCACHE_DYN_WAYS     0       /* Dcache dynamic way support */
 
 
-
-
 /****************************************************************************
     Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
  ****************************************************************************/
 
-
 #ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
 
 /*----------------------------------------------------------------------
index 6d321f886609944b39bccf17b1ed72f2fb474067..69448cfff783210c2d929147ce2ad394d62969fa 100644 (file)
        .endm
 
 
-
        .macro  ___flush_invalidate_dcache_range ar as at
 
 #if XCHAL_DCACHE_SIZE
        .endm
 
 
-
        .macro  ___flush_invalidate_dcache_page ar as
 
 #if XCHAL_DCACHE_SIZE
index 995c42960178df7a8a4f312a3f073257a33317a1..9e0941cc9d6e48abf8e0627c82f002a3078ce451 100644 (file)
@@ -88,8 +88,6 @@ found:
                pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2,
                pbsp->wrlvl_ctl_3);
 
-
-
        popts->half_strength_driver_enable = 0;
        /*
         * Write leveling override
index b52d9610e9814bc6522e4c54cb0a2d939b89a629..75d317342f60c21cd33137a6287715dd004a16c1 100755 (executable)
@@ -158,7 +158,6 @@ Start Address   End Address Definition                      Max size
 0xE8000000     0xE801FFFF      RCW (current bank)              128KB
 
 
-
 Software configurations and board settings
 ------------------------------------------
 1. NOR boot:
index 323835ab1b0cb3c71190bd6a61fa6e67d298dfd6..c2a6f9199aceb2ae2098dd7636c4e112ebeaa1b8 100644 (file)
@@ -12399,8 +12399,6 @@ unsigned long ps7_post_config_1_0[] = {
     //
 };
 
-
-
 #include "xil_io.h"
 
 unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
@@ -12477,8 +12475,6 @@ ps7_init()
   ret = ps7_config (ps7_ddr_init_data);
   if (ret != PS7_INIT_SUCCESS) return ret;
 
-
-
   // Peripherals init
   ret = ps7_config (ps7_peripherals_init_data);
   if (ret != PS7_INIT_SUCCESS) return ret;
index 248c72861c8e730fbd4f063c2aff811e9a6a65f0..fd102a3ce4af82a2eca7d9f5787f6db574d56446 100644 (file)
@@ -12732,8 +12732,6 @@ unsigned long ps7_post_config_1_0[] = {
     //
 };
 
-
-
 #include "xil_io.h"
 
 unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
@@ -12810,8 +12808,6 @@ ps7_init()
   ret = ps7_config (ps7_ddr_init_data);
   if (ret != PS7_INIT_SUCCESS) return ret;
 
-
-
   // Peripherals init
   ret = ps7_config (ps7_peripherals_init_data);
   if (ret != PS7_INIT_SUCCESS) return ret;
index cc90a4c94b540b37b577f4165b535fbf31dbb271..796e5b0c5f629e0d6c337408a46140c2788f7c49 100644 (file)
@@ -12639,8 +12639,6 @@ unsigned long ps7_post_config_1_0[] = {
     //
 };
 
-
-
 #include "xil_io.h"
 
 unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
@@ -12717,8 +12715,6 @@ ps7_init()
   ret = ps7_config (ps7_ddr_init_data);
   if (ret != PS7_INIT_SUCCESS) return ret;
 
-
-
   // Peripherals init
   ret = ps7_config (ps7_peripherals_init_data);
   if (ret != PS7_INIT_SUCCESS) return ret;
index 8fb3908e022c355c4e97a17b62b5313e5dcf76d5..baf89a580001b456085ef5f487ddcb7d7a61611c 100644 (file)
@@ -12297,8 +12297,6 @@ unsigned long ps7_post_config_1_0[] = {
     //
 };
 
-
-
 #include "xil_io.h"
 
 unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
@@ -12375,8 +12373,6 @@ ps7_init()
   ret = ps7_config (ps7_ddr_init_data);
   if (ret != PS7_INIT_SUCCESS) return ret;
 
-
-
   // Peripherals init
   ret = ps7_config (ps7_peripherals_init_data);
   if (ret != PS7_INIT_SUCCESS) return ret;
index 549c9056ddcae2e4672466ab2ff90d0a56531cf6..0bd67fcf47c5410ffc7bcc7d790f17844b56e41a 100644 (file)
@@ -39,7 +39,6 @@ int bedbug_puts (const char *str)
 }                              /* bedbug_puts */
 
 
-
 /* ======================================================================
  * Initialize the bug_ctx structure used by the bedbug debugger.  This is
  * specific to the CPU since each has different debug registers and
@@ -53,7 +52,6 @@ int bedbug_init(void)
 }                              /* bedbug_init */
 
 
-
 /* ======================================================================
  * Entry point from the interpreter to the disassembler.  Repeated calls
  * will resume from the last disassembled address.
@@ -183,7 +181,6 @@ void do_bedbug_breakpoint (struct pt_regs *regs)
 }                              /* do_bedbug_breakpoint */
 
 
-
 /* ======================================================================
  * Called from the CPU-specific breakpoint handling routine.  Enter a
  * mini main loop until the stopped flag is cleared from the breakpoint
@@ -241,7 +238,6 @@ void bedbug_main_loop (unsigned long addr, struct pt_regs *regs)
 }                              /* bedbug_main_loop */
 
 
-
 /* ======================================================================
  * Interpreter command to continue from a breakpoint.  Just clears the
  * stopped flag in the context so that the breakpoint routine will
index a3341bbb614206b23b259fcb9e1c0ea587b6ee2a..1206507911761ea5832ac8b8aa2979e8195fcc59 100644 (file)
@@ -88,7 +88,6 @@ for pure DFU USB transfer.
                    possible to set large enough default buffer (8 MiB @ BBB)
 
 
-
 FIT image format for download
 -----------------------------
 
@@ -110,7 +109,6 @@ should look like
 where "u-boot.bin" is the DFU entity name to be stored.
 
 
-
 To do
 -----
 
index d38834c67dffe910af59fa15531b9fcd2303a33b..2d75c2b1b53c90837c9fdf5102fd0b3cd72edd99 100644 (file)
@@ -21,7 +21,6 @@ the reference implementation maintained by Linaro.
                           in drivers/tee/optee/optee_smc.h
 
 
-
 Example:
        firmware {
                optee {
index 608ad64f65650ffac58eded2a25a4692abadbdbd..e287c31b93fc11ae6e487abe377bcacd0f79f185 100644 (file)
@@ -54,8 +54,6 @@ static int hi6220_gpio_get_value(struct udevice *dev, unsigned gpio)
        return !!readb(bank->base + (BIT(gpio + 2)));
 }
 
-
-
 static const struct dm_gpio_ops gpio_hi6220_ops = {
        .direction_input        = hi6220_gpio_direction_input,
        .direction_output       = hi6220_gpio_direction_output,
index 5057bd966504b450b86ec3c75017a47f31c8620d..aa13af3ae109bfdcd8830402b11b39450b68e693 100644 (file)
@@ -772,8 +772,6 @@ void bus_i2c_init(int index, int speed, int unused,
        bus_i2c_set_bus_speed(&mxc_i2c_buses[index], speed);
 }
 
-
-
 /*
  * Init I2C Bus
  */
index 00c3c6c412260476dea75cd151491f02083f976d..5cc256bf20d223d2535a393deaf08d23dc3235b7 100644 (file)
@@ -545,8 +545,6 @@ int nand_verify(struct mtd_info *mtd, loff_t ofs, size_t len, u_char *buf)
        return rval ? -EIO : 0;
 }
 
-
-
 /**
  * nand_write_skip_bad:
  *
index 5bdcede8f1449ae6192e6abf3f3283ab45991a6b..4e34248ff6f0cbaed8733e7a43e62580b3bf0483 100644 (file)
@@ -5251,11 +5251,7 @@ e1000_configure_tx(struct e1000_hw *hw)
                mdelay(20);
        }
 
-
-
        E1000_WRITE_REG(hw, TCTL, tctl);
-
-
 }
 
 /**
index 5d00bff9fd02be58391ef7deec706fbb1fcc1dbb..26f4ac2ca8151152bf84c86bf7bedb6c6fc9d585 100644 (file)
@@ -497,7 +497,6 @@ STBTT_DEF void stbtt_GetBakedQuad(stbtt_bakedchar *chardata, int pw, int ph,  //
 // It's inefficient; you might want to c&p it and optimize it.
 
 
-
 //////////////////////////////////////////////////////////////////////////////
 //
 // NEW TEXTURE BAKING API
index 6a76d1e456fb3e9102143d376cd57bf08d0879d8..d8eff0b9122215b97dfe0f4a4f571545ef742d52 100644 (file)
 #define BTRFS_STRING_ITEM_KEY  253
 
 
-
 /* 32 bytes in various csum fields */
 #define BTRFS_CSUM_SIZE 32
 
index 47617c2ab39c30fc5394ed3550e11795d68e7885..7831687114b66b36cb52fd1859d1d2c01eaceac7 100644 (file)
 #define CONFIG_ENV_RANGE               (4 * CONFIG_SYS_ENV_SECT_SIZE)
 
 
-
 #undef COMMON_ENV_DFU_ARGS
 #define COMMON_ENV_DFU_ARGS    "dfu_args=run bootargs_defaults;" \
                                "setenv bootargs ${bootargs};" \
index 96d81d9934917254e021b33bc58d888fb1d03ee3..e5e7338192f64c0a9cddb0877ded3cb3dc0fb184 100644 (file)
@@ -173,8 +173,6 @@ do { \
        MC_RSP_OP(cmd, 2, 0,  64, uint64_t, state->options);\
 } while (0)
 
-
-
 /*                cmd, param, offset, width, type, arg_name */
 #define DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr) \
 do { \
index 666480db931252baf71ec78eb9e12efc617aa74e..265e89f02b60767074892b8ae579a0eada8f5bf2 100644 (file)
@@ -52,7 +52,6 @@ typedef enum {
 } flstate_t;
 
 
-
 /* NOTE: confusingly, this can be used to refer to more than one chip at a time,
    if they're interleaved.  This can even refer to individual partitions on
    the same physical chip when present. */
index ef020ad162b091cec67d901b5b80f9a3f737bfd2..dca7efa14260786ddf2c3ce3bab0a442a4c6b1f0 100644 (file)
 #define UART_ACR_ASREN 0x80    /* Additional status enable */
 
 
-
 /*
  * These definitions are for the RSA-DV II/S card, from
  *