Rename this to be consistent with the change from 'platdata'.
Signed-off-by: Simon Glass <sjg@chromium.org>
STM32_SMC_READ_OTP,
otp, 0, val);
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
/* read current shadow value */
ret = bsec_read_shadow(plat->base, &tmp_data, otp);
STM32_SMC_READ_SHADOW,
otp, 0, val);
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
return bsec_read_shadow(plat->base, val, otp);
}
static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp)
{
- struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
+ struct stm32mp_bsec_platdata *plat = dev_get_plat(dev);
/* return OTP permanent write lock status */
*val = bsec_read_lock(plat->base + BSEC_WRLOCK_OFF, otp);
STM32_SMC_PROG_OTP,
otp, val);
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
return bsec_program_otp(plat->base, val, otp);
STM32_SMC_WRITE_SHADOW,
otp, val);
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
return bsec_write_shadow(plat->base, val, otp);
}
static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev)
{
- struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
+ struct stm32mp_bsec_platdata *plat = dev_get_plat(dev);
plat->base = (u32)dev_read_addr_ptr(dev);
*/
if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) {
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
if (!bsec_read_SR_lock(plat->base, otp))
return false;
}
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
if (readl(plat->base + BSEC_DENABLE_OFF) & BSEC_DENABLE_DBGSWENABLE)
return true;
static int apl_hostbridge_early_init_pinctrl(struct udevice *dev)
{
- struct apl_hostbridge_platdata *plat = dev_get_platdata(dev);
+ struct apl_hostbridge_platdata *plat = dev_get_plat(dev);
struct udevice *pinctrl;
int ret;
static int apl_hostbridge_early_init(struct udevice *dev)
{
- struct apl_hostbridge_platdata *plat = dev_get_platdata(dev);
+ struct apl_hostbridge_platdata *plat = dev_get_plat(dev);
u32 region_size;
ulong base;
u32 reg;
static int apl_hostbridge_ofdata_to_platdata(struct udevice *dev)
{
- struct apl_hostbridge_platdata *plat = dev_get_platdata(dev);
+ struct apl_hostbridge_platdata *plat = dev_get_plat(dev);
struct udevice *pinctrl;
int ret;
int apl_pmc_ofdata_to_uc_platdata(struct udevice *dev)
{
struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
- struct apl_pmc_platdata *plat = dev_get_platdata(dev);
+ struct apl_pmc_platdata *plat = dev_get_plat(dev);
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
u32 base[6];
static int enable_pmcbar(struct udevice *dev)
{
struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
- struct apl_pmc_platdata *priv = dev_get_platdata(dev);
+ struct apl_pmc_platdata *priv = dev_get_plat(dev);
pci_dev_t pmc = priv->bdf;
/*
static int apl_ns16550_probe(struct udevice *dev)
{
- struct ns16550_platdata *plat = dev_get_platdata(dev);
+ struct ns16550_platdata *plat = dev_get_plat(dev);
if (!CONFIG_IS_ENABLED(PCI))
apl_uart_init(plat->bdf, plat->base);
static int apl_ns16550_ofdata_to_platdata(struct udevice *dev)
{
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct dtd_intel_apl_ns16550 *dtplat = dev_get_platdata(dev);
+ struct dtd_intel_apl_ns16550 *dtplat = dev_get_plat(dev);
struct ns16550_platdata *plat;
/*
static void broadwell_sata_init(struct udevice *dev)
{
- struct sata_platdata *plat = dev_get_platdata(dev);
+ struct sata_platdata *plat = dev_get_plat(dev);
u32 reg32;
u8 *abar;
u16 reg16;
static int broadwell_sata_enable(struct udevice *dev)
{
- struct sata_platdata *plat = dev_get_platdata(dev);
+ struct sata_platdata *plat = dev_get_plat(dev);
struct gpio_desc desc;
u16 map;
int ret;
static int broadwell_sata_ofdata_to_platdata(struct udevice *dev)
{
- struct sata_platdata *plat = dev_get_platdata(dev);
+ struct sata_platdata *plat = dev_get_plat(dev);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(dev);
int ret;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct itss_platdata *plat = dev_get_platdata(dev);
+ struct itss_platdata *plat = dev_get_plat(dev);
struct dtd_intel_itss *dtplat = &plat->dtplat;
/*
*/
static int p2sb_early_init(struct udevice *dev)
{
- struct p2sb_platdata *plat = dev_get_platdata(dev);
+ struct p2sb_platdata *plat = dev_get_plat(dev);
pci_dev_t pdev = plat->bdf;
/*
int p2sb_ofdata_to_platdata(struct udevice *dev)
{
struct p2sb_uc_priv *upriv = dev_get_uclass_priv(dev);
- struct p2sb_platdata *plat = dev_get_platdata(dev);
+ struct p2sb_platdata *plat = dev_get_plat(dev);
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
int ret;
uclass_find_first_device(UCLASS_VIDEO, &dev);
if (dev) {
- struct atmel_lcd_platdata *plat = dev_get_platdata(dev);
+ struct atmel_lcd_platdata *plat = dev_get_plat(dev);
plat->timing_index = 1;
}
printf("entry %d - instance %08x, ops %08x, plat %08x\n",
i++, (uint)map_to_sysmem(dev),
(uint)map_to_sysmem(dev->driver->ops),
- (uint)map_to_sysmem(dev_get_platdata(dev)));
+ (uint)map_to_sysmem(dev_get_plat(dev)));
}
return cmd_process_error(cmdtp, ret);
struct host_block_dev *host_dev;
#ifdef CONFIG_BLK
- host_dev = dev_get_platdata(blk_dev->bdev);
+ host_dev = dev_get_plat(blk_dev->bdev);
#else
host_dev = blk_dev->priv;
#endif
* is shared by all LUNs (block devices) attached to this mass storage
* device.
*/
- data = dev_get_platdata(udev->dev);
+ data = dev_get_plat(udev->dev);
if (!usb_storage_probe(udev, 0, data))
return 0;
max_lun = usb_get_max_lun(data);
static int simple_hello(struct udevice *dev, int ch)
{
- const struct dm_demo_pdata *pdata = dev_get_platdata(dev);
+ const struct dm_demo_pdata *pdata = dev_get_plat(dev);
printf("Hello from %08x: %s %d\n", map_to_sysmem(dev),
pdata->colour, pdata->sides);
.. code-block:: c
struct udevice *dev;
- struct dtd_rockchip_rk3288_dw_mshc *plat = dev_get_platdata(dev);
+ struct dtd_rockchip_rk3288_dw_mshc *plat = dev_get_plat(dev);
This avoids the code overhead of converting the device tree data to
platform data in the driver. The ofdata_to_platdata() method should
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
/* Decode the device tree data */
- struct mmc_platdata *plat = dev_get_platdata(dev);
+ struct mmc_platdata *plat = dev_get_plat(dev);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(dev);
static int mmc_probe(struct udevice *dev)
{
- struct mmc_platdata *plat = dev_get_platdata(dev);
+ struct mmc_platdata *plat = dev_get_plat(dev);
#if CONFIG_IS_ENABLED(OF_PLATDATA)
/* Decode the of-platdata from the C structures */
static int exynos_spi_probe(struct udevice *bus)
{
- struct exynos_spi_platdata *plat = dev_get_platdata(bus);
+ struct exynos_spi_platdata *plat = dev_get_plat(bus);
struct exynos_spi_priv *priv = dev_get_priv(bus);
priv->regs = plat->regs;
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct exynos_spi_platdata *pdata = dev_get_platdata(bus);
+ struct exynos_spi_platdata *pdata = dev_get_plat(bus);
struct exynos_spi_priv *priv = dev_get_priv(bus);
/* If it's too soon to do another transaction, wait */
static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
void *buffer)
{
- struct fsl_ata_priv *priv = dev_get_platdata(dev);
+ struct fsl_ata_priv *priv = dev_get_plat(dev);
fsl_sata_t *sata = priv->fsl_sata;
#endif
u32 rc;
static ulong sata_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
const void *buffer)
{
- struct fsl_ata_priv *priv = dev_get_platdata(dev);
+ struct fsl_ata_priv *priv = dev_get_plat(dev);
fsl_sata_t *sata = priv->fsl_sata;
#endif
u32 rc;
static int scan_sata(struct udevice *dev)
{
struct blk_desc *desc = dev_get_uclass_plat(dev);
- struct fsl_ata_priv *priv = dev_get_platdata(dev);
+ struct fsl_ata_priv *priv = dev_get_plat(dev);
fsl_sata_t *sata = priv->fsl_sata;
#endif
continue;
}
- blk_priv = dev_get_platdata(blk);
+ blk_priv = dev_get_plat(blk);
blk_priv->fsl_sata = priv->fsl_sata;
/* Scan SATA port */
ret = scan_sata(blk);
/* Cut from sata_mv in linux kernel */
static int mv_stop_edma_engine(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
int i;
/* Disable eDMA. The disable bit auto clears. */
static int mv_start_edma_engine(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
u32 tmp;
/* Check preconditions */
static int mv_reset_channel(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
/* Make sure edma is stopped */
mv_stop_edma_engine(dev, port);
static void mv_reset_port(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
mv_reset_channel(dev, port);
static int probe_port(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
int tries, tries2, set15 = 0;
u32 tmp;
/* Get request queue in pointer */
static int get_reqip(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
u32 tmp;
tmp = in_le32(priv->regbase + EDMA_RQIPR) & EDMA_RQIPR_IPMASK;
static void set_reqip(struct udevice *dev, int port, int reqin)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
u32 tmp;
tmp = in_le32(priv->regbase + EDMA_RQIPR) & ~EDMA_RQIPR_IPMASK;
/* Get response queue in pointer */
static int get_rspip(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
u32 tmp;
tmp = in_le32(priv->regbase + EDMA_RSIPR) & EDMA_RSIPR_IPMASK;
/* Get response queue out pointer */
static int get_rspop(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
u32 tmp;
tmp = in_le32(priv->regbase + EDMA_RSOPR) & EDMA_RSOPR_OPMASK;
/* Set response queue pointer */
static void set_rspop(struct udevice *dev, int port, int reqin)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
u32 tmp;
tmp = in_le32(priv->regbase + EDMA_RSOPR) & ~EDMA_RSOPR_OPMASK;
static void process_responses(struct udevice *dev, int port)
{
#ifdef DEBUG
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
#endif
u32 tmp;
u32 outind = get_rspop(dev, port);
struct sata_fis_h2d *cfis,
u8 *buffer, u32 len, u32 iswrite)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
struct crqb *req;
int slot;
u32 start;
struct sata_fis_h2d *cfis, u8 *buffer,
u32 len, u32 iswrite)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
int i;
u16 *tp;
static void mv_sata_xfer_mode(struct udevice *dev, int port, u16 *id)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
priv->pio = id[ATA_ID_PIO_MODES];
priv->mwdma = id[ATA_ID_MWDMA_MODES];
static void mv_sata_set_features(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
struct sata_fis_h2d cfis;
u8 udma_cap;
static int sata_mv_init_sata(struct udevice *dev, int port)
{
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
debug("Initialize sata dev: %d\n", port);
static int sata_mv_scan_sata(struct udevice *dev, int port)
{
struct blk_desc *desc = dev_get_uclass_plat(dev);
- struct mv_priv *priv = dev_get_platdata(dev);
+ struct mv_priv *priv = dev_get_plat(dev);
unsigned char serial[ATA_ID_SERNO_LEN + 1];
unsigned char firmware[ATA_ID_FW_REV_LEN + 1];
unsigned char product[ATA_ID_PROD_LEN + 1];
static ulong sata_mv_read(struct udevice *blk, lbaint_t blknr,
lbaint_t blkcnt, void *buffer)
{
- struct mv_priv *priv = dev_get_platdata(blk);
+ struct mv_priv *priv = dev_get_plat(blk);
return ata_low_level_rw(blk, priv->dev_nr, blknr, blkcnt,
buffer, READ_CMD);
static ulong sata_mv_write(struct udevice *blk, lbaint_t blknr,
lbaint_t blkcnt, const void *buffer)
{
- struct mv_priv *priv = dev_get_platdata(blk);
+ struct mv_priv *priv = dev_get_plat(blk);
return ata_low_level_rw(blk, priv->dev_nr, blknr, blkcnt,
(void *)buffer, WRITE_CMD);
return ret;
}
- priv = dev_get_platdata(blk);
+ priv = dev_get_plat(blk);
priv->dev_nr = i;
/* Init SATA port */
static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
void *buffer)
{
- struct sil_sata_priv *priv = dev_get_platdata(dev);
+ struct sil_sata_priv *priv = dev_get_plat(dev);
int port_number = priv->port_num;
struct sil_sata *sata = priv->sil_sata_desc[port_number];
#endif
ulong sata_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
const void *buffer)
{
- struct sil_sata_priv *priv = dev_get_platdata(dev);
+ struct sil_sata_priv *priv = dev_get_plat(dev);
int port_number = priv->port_num;
struct sil_sata *sata = priv->sil_sata_desc[port_number];
#endif
#else
static int sil_init_sata(struct udevice *uc_dev, int dev)
{
- struct sil_sata_priv *priv = dev_get_platdata(uc_dev);
+ struct sil_sata_priv *priv = dev_get_plat(uc_dev);
#endif
struct sil_sata *sata;
void *port;
static int scan_sata(struct udevice *blk_dev, int dev)
{
struct blk_desc *desc = dev_get_uclass_plat(blk_dev);
- struct sil_sata_priv *priv = dev_get_platdata(blk_dev);
+ struct sil_sata_priv *priv = dev_get_plat(blk_dev);
struct sil_sata *sata = priv->sil_sata_desc[dev];
#endif
unsigned char serial[ATA_ID_SERNO_LEN + 1];
unsigned long start, lbaint_t blkcnt,
void *buffer)
{
- struct host_block_dev *host_dev = dev_get_platdata(dev);
+ struct host_block_dev *host_dev = dev_get_plat(dev);
struct blk_desc *block_dev = dev_get_uclass_plat(dev);
#else
unsigned long start, lbaint_t blkcnt,
const void *buffer)
{
- struct host_block_dev *host_dev = dev_get_platdata(dev);
+ struct host_block_dev *host_dev = dev_get_plat(dev);
struct blk_desc *block_dev = dev_get_uclass_plat(dev);
#else
static unsigned long host_block_write(struct blk_desc *block_dev,
if (ret)
goto err_file;
- host_dev = dev_get_platdata(dev);
+ host_dev = dev_get_plat(dev);
host_dev->fd = fd;
host_dev->filename = fname;
static int v5l2_enable(struct udevice *dev)
{
- struct v5l2_plat *plat = dev_get_platdata(dev);
+ struct v5l2_plat *plat = dev_get_plat(dev);
volatile struct l2cache *regs = plat->regs;
if (regs)
static int v5l2_disable(struct udevice *dev)
{
- struct v5l2_plat *plat = dev_get_platdata(dev);
+ struct v5l2_plat *plat = dev_get_plat(dev);
volatile struct l2cache *regs = plat->regs;
u8 hart = gd->arch.boot_hart;
void __iomem *cctlcmd = (void __iomem *)CCTL_CMD_REG(regs, hart);
static int v5l2_ofdata_to_platdata(struct udevice *dev)
{
- struct v5l2_plat *plat = dev_get_platdata(dev);
+ struct v5l2_plat *plat = dev_get_plat(dev);
struct l2cache *regs;
regs = (struct l2cache *)dev_read_addr(dev);
static int v5l2_probe(struct udevice *dev)
{
- struct v5l2_plat *plat = dev_get_platdata(dev);
+ struct v5l2_plat *plat = dev_get_plat(dev);
struct l2cache *regs = plat->regs;
u32 ctl_val;
static void clk_basic_init(struct udevice *dev,
const struct cm_config * const cfg)
{
- struct socfpga_clk_platdata *plat = dev_get_platdata(dev);
+ struct socfpga_clk_platdata *plat = dev_get_plat(dev);
u32 vcocalib;
if (!cfg)
static ulong socfpga_clk_get_rate(struct clk *clk)
{
- struct socfpga_clk_platdata *plat = dev_get_platdata(clk->dev);
+ struct socfpga_clk_platdata *plat = dev_get_plat(clk->dev);
switch (clk->id) {
case AGILEX_MPU_CLK:
static int socfpga_clk_ofdata_to_platdata(struct udevice *dev)
{
- struct socfpga_clk_platdata *plat = dev_get_platdata(dev);
+ struct socfpga_clk_platdata *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);
static int socfpga_a10_clk_get_upstream(struct clk *clk, struct clk **upclk)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(clk->dev);
+ struct socfpga_a10_clk_platdata *plat = dev_get_plat(clk->dev);
u32 reg, maxval;
if (plat->clks.count == 0)
static int socfpga_a10_clk_endisable(struct clk *clk, bool enable)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(clk->dev);
+ struct socfpga_a10_clk_platdata *plat = dev_get_plat(clk->dev);
struct clk *upclk = NULL;
int ret;
static ulong socfpga_a10_clk_get_rate(struct clk *clk)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(clk->dev);
+ struct socfpga_a10_clk_platdata *plat = dev_get_plat(clk->dev);
struct clk *upclk = NULL;
ulong rate = 0, reg, numer, denom;
int ret;
*/
static void socfpga_a10_handoff_workaround(struct udevice *dev)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev);
+ struct socfpga_a10_clk_platdata *plat = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
struct clk_bulk *bulk = &plat->clks;
int i, ret, offset = dev_of_offset(dev);
static int socfpga_a10_clk_probe(struct udevice *dev)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev);
+ struct socfpga_a10_clk_platdata *plat = dev_get_plat(dev);
struct socfpga_a10_clk_platdata *pplat;
struct udevice *pdev;
const void *fdt = gd->fdt_blob;
if (!pdev)
return -ENODEV;
- pplat = dev_get_platdata(pdev);
+ pplat = dev_get_plat(pdev);
if (!pplat)
return -EINVAL;
static int socfpga_a10_ofdata_to_platdata(struct udevice *dev)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev);
+ struct socfpga_a10_clk_platdata *plat = dev_get_plat(dev);
unsigned int divreg[3], gatereg[2];
int ret;
static int at91_pmc_core_probe(struct udevice *dev)
{
- struct pmc_platdata *plat = dev_get_platdata(dev);
+ struct pmc_platdata *plat = dev_get_plat(dev);
dev = dev_get_parent(dev);
int at91_clk_probe(struct udevice *dev)
{
struct udevice *dev_periph_container, *dev_pmc;
- struct pmc_platdata *plat = dev_get_platdata(dev);
+ struct pmc_platdata *plat = dev_get_plat(dev);
dev_periph_container = dev_get_parent(dev);
dev_pmc = dev_get_parent(dev_periph_container);
/* Main osc clock specific code. */
static int main_osc_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
if (readl(&pmc->sr) & AT91_PMC_MOSCSELS)
/* PLLA clock specific code. */
static int plla_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
if (readl(&pmc->sr) & AT91_PMC_LOCKA)
static ulong at91_plladiv_clk_get_rate(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk source;
ulong clk_rate;
static ulong at91_plladiv_clk_set_rate(struct clk *clk, ulong rate)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk source;
ulong parent_rate;
static int system_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
u32 mask;
static int periph_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
enum periph_clk_type clk_type;
void *addr;
static int utmi_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk clk_dev;
ulong clk_rate;
static int utmi_clk_ofdata_to_platdata(struct udevice *dev)
{
- struct pmc_platdata *plat = dev_get_platdata(dev);
+ struct pmc_platdata *plat = dev_get_plat(dev);
struct udevice *syscon;
uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
ulong rate = gd->arch.mck_rate_hz;
static ulong generic_clk_get_rate(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk parent;
ulong clk_rate;
static ulong generic_clk_set_rate(struct clk *clk, ulong rate)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct generic_clk_priv *priv = dev_get_priv(clk->dev);
struct clk parent, best_parent;
static ulong at91_usb_clk_get_rate(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk source;
u32 tmp, usbdiv;
static ulong at91_usb_clk_set_rate(struct clk *clk, ulong rate)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_platdata *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct at91_usb_clk_priv *priv = dev_get_priv(clk->dev);
struct clk source, best_source;
static ulong clk_boston_get_rate(struct clk *clk)
{
- struct clk_boston *state = dev_get_platdata(clk->dev);
+ struct clk_boston *state = dev_get_plat(clk->dev);
uint32_t in_rate, mul, div;
uint mmcmdiv;
int err;
static int clk_boston_ofdata_to_platdata(struct udevice *dev)
{
- struct clk_boston *state = dev_get_platdata(dev);
+ struct clk_boston *state = dev_get_plat(dev);
struct udevice *syscon;
int err;
};
#define to_clk_fixed_factor(dev) \
- ((struct clk_fixed_factor *)dev_get_platdata(dev))
+ ((struct clk_fixed_factor *)dev_get_plat(dev))
static ulong clk_fixed_factor_get_rate(struct clk *clk)
{
#ifdef CONFIG_SPL_BUILD
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3188_clk_plat *plat = dev_get_platdata(dev);
+ struct rk3188_clk_plat *plat = dev_get_plat(dev);
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
return PTR_ERR(priv->grf);
#ifdef CONFIG_SPL_BUILD
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3288_clk_plat *plat = dev_get_platdata(dev);
+ struct rk3288_clk_plat *plat = dev_get_plat(dev);
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
{
struct rk3368_clk_priv __maybe_unused *priv = dev_get_priv(dev);
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3368_clk_plat *plat = dev_get_platdata(dev);
+ struct rk3368_clk_plat *plat = dev_get_plat(dev);
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
bool init_clocks = false;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3399_clk_plat *plat = dev_get_platdata(dev);
+ struct rk3399_clk_plat *plat = dev_get_plat(dev);
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
#endif
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3399_pmuclk_plat *plat = dev_get_platdata(dev);
+ struct rk3399_pmuclk_plat *plat = dev_get_plat(dev);
priv->pmucru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
return ret;
}
-void *dev_get_platdata(const struct udevice *dev)
+void *dev_get_plat(const struct udevice *dev)
{
if (!dev) {
dm_warn("%s: null device\n", __func__);
* using OF_PLATDATA will need to ensure that this is true.
*/
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct syscon_base_platdata *plat = dev_get_platdata(dev);
+ struct syscon_base_platdata *plat = dev_get_plat(dev);
return regmap_init_mem_platdata(dev, plat->reg, ARRAY_SIZE(plat->reg),
&priv->regmap);
int at91_cpu_get_desc(const struct udevice *dev, char *buf, int size)
{
- struct at91_cpu_platdata *plat = dev_get_platdata(dev);
+ struct at91_cpu_platdata *plat = dev_get_plat(dev);
snprintf(buf, size, "%s\n"
"Crystal frequency: %8lu MHz\n"
static int at91_cpu_get_info(const struct udevice *dev, struct cpu_info *info)
{
- struct at91_cpu_platdata *plat = dev_get_platdata(dev);
+ struct at91_cpu_platdata *plat = dev_get_plat(dev);
info->cpu_freq = plat->cpufreq_mhz * 1000000;
info->features = BIT(CPU_FEAT_L1_CACHE);
static int at91_cpu_probe(struct udevice *dev)
{
- struct at91_cpu_platdata *plat = dev_get_platdata(dev);
+ struct at91_cpu_platdata *plat = dev_get_plat(dev);
struct clk clk;
ulong rate;
int ret;
static void set_core_data(struct udevice *dev)
{
- struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+ struct cpu_imx_platdata *plat = dev_get_plat(dev);
if (device_is_compatible(dev, "arm,cortex-a35")) {
plat->cpu_rsrc = SC_R_A35;
int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
{
- struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+ struct cpu_imx_platdata *plat = dev_get_plat(dev);
int ret, temp;
if (size < 100)
static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
{
- struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+ struct cpu_imx_platdata *plat = dev_get_plat(dev);
info->cpu_freq = plat->freq_mhz * 1000;
info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
static int cpu_imx_is_current(struct udevice *dev)
{
- struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+ struct cpu_imx_platdata *plat = dev_get_plat(dev);
if (plat->mpidr == (read_mpidr() & 0xffff))
return 1;
static ulong imx8_get_cpu_rate(struct udevice *dev)
{
- struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+ struct cpu_imx_platdata *plat = dev_get_plat(dev);
ulong rate;
int ret;
static int imx8_cpu_probe(struct udevice *dev)
{
- struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+ struct cpu_imx_platdata *plat = dev_get_plat(dev);
u32 cpurev;
set_core_data(dev);
/* Crazy little function to draw shapes on the console */
static int shape_hello(struct udevice *dev, int ch)
{
- const struct dm_demo_pdata *pdata = dev_get_platdata(dev);
+ const struct dm_demo_pdata *pdata = dev_get_plat(dev);
struct shape_data *data = dev_get_priv(dev);
static const struct shape {
int start;
static int shape_ofdata_to_platdata(struct udevice *dev)
{
- struct dm_demo_pdata *pdata = dev_get_platdata(dev);
+ struct dm_demo_pdata *pdata = dev_get_plat(dev);
int ret;
/* Parse the data that is common with all demo devices */
static int simple_hello(struct udevice *dev, int ch)
{
- const struct dm_demo_pdata *pdata = dev_get_platdata(dev);
+ const struct dm_demo_pdata *pdata = dev_get_plat(dev);
printf("Hello from %08x: %s %d\n", (uint)map_to_sysmem(dev), pdata->colour,
pdata->sides);
int demo_parse_dt(struct udevice *dev)
{
- struct dm_demo_pdata *pdata = dev_get_platdata(dev);
+ struct dm_demo_pdata *pdata = dev_get_plat(dev);
int dn = dev_of_offset(dev);
pdata->sides = fdtdec_get_int(gd->fdt_blob, dn, "sides", 0);
static int altera_pio_direction_input(struct udevice *dev, unsigned pin)
{
- struct altera_pio_platdata *plat = dev_get_platdata(dev);
+ struct altera_pio_platdata *plat = dev_get_plat(dev);
struct altera_pio_regs *const regs = plat->regs;
clrbits_le32(®s->direction, 1 << pin);
static int altera_pio_direction_output(struct udevice *dev, unsigned pin,
int val)
{
- struct altera_pio_platdata *plat = dev_get_platdata(dev);
+ struct altera_pio_platdata *plat = dev_get_plat(dev);
struct altera_pio_regs *const regs = plat->regs;
if (val)
static int altera_pio_get_value(struct udevice *dev, unsigned pin)
{
- struct altera_pio_platdata *plat = dev_get_platdata(dev);
+ struct altera_pio_platdata *plat = dev_get_plat(dev);
struct altera_pio_regs *const regs = plat->regs;
return !!(readl(®s->data) & (1 << pin));
static int altera_pio_set_value(struct udevice *dev, unsigned pin, int val)
{
- struct altera_pio_platdata *plat = dev_get_platdata(dev);
+ struct altera_pio_platdata *plat = dev_get_plat(dev);
struct altera_pio_regs *const regs = plat->regs;
if (val)
static int altera_pio_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- struct altera_pio_platdata *plat = dev_get_platdata(dev);
+ struct altera_pio_platdata *plat = dev_get_plat(dev);
uc_priv->gpio_count = plat->gpio_count;
uc_priv->bank_name = plat->bank_name;
static int altera_pio_ofdata_to_platdata(struct udevice *dev)
{
- struct altera_pio_platdata *plat = dev_get_platdata(dev);
+ struct altera_pio_platdata *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev),
sizeof(struct altera_pio_regs),
static int at91_gpio_probe(struct udevice *dev)
{
struct at91_port_priv *port = dev_get_priv(dev);
- struct at91_port_platdata *plat = dev_get_platdata(dev);
+ struct at91_port_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct clk clk;
int ret;
static struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice *dev,
u32 bank)
{
- struct atmel_pio4_platdata *plat = dev_get_platdata(dev);
+ struct atmel_pio4_platdata *plat = dev_get_plat(dev);
struct atmel_pio4_port *port_base =
(struct atmel_pio4_port *)((u32)plat->reg_base +
ATMEL_PIO_BANK_OFFSET * bank);
static int atmel_pio4_probe(struct udevice *dev)
{
- struct atmel_pio4_platdata *plat = dev_get_platdata(dev);
+ struct atmel_pio4_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct atmel_pioctrl_data *pioctrl_data;
struct clk clk;
static int bcm2835_gpio_probe(struct udevice *dev)
{
struct bcm2835_gpios *gpios = dev_get_priv(dev);
- struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev);
+ struct bcm2835_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
uc_priv->bank_name = "GPIO";
#if CONFIG_IS_ENABLED(OF_CONTROL)
static int bcm2835_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev);
+ struct bcm2835_gpio_platdata *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);
static int davinci_gpio_probe(struct udevice *dev)
{
struct davinci_gpio_bank *bank = dev_get_priv(dev);
- struct davinci_gpio_platdata *plat = dev_get_platdata(dev);
+ struct davinci_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
static int davinci_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct davinci_gpio_platdata *plat = dev_get_platdata(dev);
+ struct davinci_gpio_platdata *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);
static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
{
- struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
+ struct gpio_dwapb_platdata *plat = dev_get_plat(dev);
clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
return 0;
static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,
int val)
{
- struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
+ struct gpio_dwapb_platdata *plat = dev_get_plat(dev);
setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
{
- struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
+ struct gpio_dwapb_platdata *plat = dev_get_plat(dev);
if (val)
setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
static int dwapb_gpio_get_function(struct udevice *dev, unsigned offset)
{
- struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
+ struct gpio_dwapb_platdata *plat = dev_get_plat(dev);
u32 gpio;
gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank));
static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
{
- struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
+ struct gpio_dwapb_platdata *plat = dev_get_plat(dev);
u32 value;
if (dwapb_gpio_get_function(dev, pin) == GPIOF_OUTPUT)
static int gpio_dwapb_bind(struct udevice *dev)
{
- struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
+ struct gpio_dwapb_platdata *plat = dev_get_plat(dev);
struct udevice *subdev;
fdt_addr_t base;
int ret, bank = 0;
static int gpio_dwapb_remove(struct udevice *dev)
{
- struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
+ struct gpio_dwapb_platdata *plat = dev_get_plat(dev);
struct gpio_dwapb_priv *priv = dev_get_priv(dev);
if (!plat && priv)
static int gpio_hog_ofdata_to_platdata(struct udevice *dev)
{
- struct gpio_hog_data *plat = dev_get_platdata(dev);
+ struct gpio_hog_data *plat = dev_get_plat(dev);
const char *nodename;
int ret;
static int gpio_hog_probe(struct udevice *dev)
{
- struct gpio_hog_data *plat = dev_get_platdata(dev);
+ struct gpio_hog_data *plat = dev_get_plat(dev);
struct gpio_hog_priv *priv = dev_get_priv(dev);
int ret;
static int hi6220_gpio_probe(struct udevice *dev)
{
struct gpio_bank *bank = dev_get_priv(dev);
- struct hikey_gpio_platdata *plat = dev_get_platdata(dev);
+ struct hikey_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev->uclass_priv;
char name[18], *str;
static int imx_rgpio2p_probe(struct udevice *dev)
{
struct imx_rgpio2p_data *bank = dev_get_priv(dev);
- struct imx_rgpio2p_plat *plat = dev_get_platdata(dev);
+ struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
int banknum;
char name[18], *str;
static int broadwell_gpio_probe(struct udevice *dev)
{
- struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
+ struct broadwell_bank_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct broadwell_bank_priv *priv = dev_get_priv(dev);
struct udevice *pinctrl;
static int broadwell_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
+ struct broadwell_bank_platdata *plat = dev_get_plat(dev);
u32 gpiobase;
int bank;
int ret;
static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)
{
- struct ich6_bank_platdata *plat = dev_get_platdata(dev);
+ struct ich6_bank_platdata *plat = dev_get_plat(dev);
u32 gpiobase;
int offset;
int ret;
static int ich6_gpio_probe(struct udevice *dev)
{
- struct ich6_bank_platdata *plat = dev_get_platdata(dev);
+ struct ich6_bank_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct ich6_bank_priv *bank = dev_get_priv(dev);
const void *prop;
*/
static int iproc_get_gpio_pctrl_mapping(struct udevice *dev)
{
- struct iproc_gpio_platdata *plat = dev_get_platdata(dev);
+ struct iproc_gpio_platdata *plat = dev_get_plat(dev);
struct iproc_gpio_pctrl_map *range = NULL;
struct ofnode_phandle_args args;
int index = 0, ret;
static int iproc_gpio_request(struct udevice *dev, u32 gpio, const char *label)
{
- struct iproc_gpio_platdata *plat = dev_get_platdata(dev);
+ struct iproc_gpio_platdata *plat = dev_get_plat(dev);
u32 pctrl;
/* nothing to do if there is no corresponding pinctrl device */
static int iproc_gpio_direction_input(struct udevice *dev, u32 gpio)
{
- struct iproc_gpio_platdata *plat = dev_get_platdata(dev);
+ struct iproc_gpio_platdata *plat = dev_get_plat(dev);
iproc_gpio_set_bit(plat, OUT_EN_OFFSET, gpio, false);
dev_dbg(dev, "gpio:%u set input\n", gpio);
static int iproc_gpio_direction_output(struct udevice *dev, u32 gpio, int value)
{
- struct iproc_gpio_platdata *plat = dev_get_platdata(dev);
+ struct iproc_gpio_platdata *plat = dev_get_plat(dev);
iproc_gpio_set_bit(plat, OUT_EN_OFFSET, gpio, true);
iproc_gpio_set_bit(plat, DATA_OUT_OFFSET, gpio, value);
static int iproc_gpio_get_value(struct udevice *dev, u32 gpio)
{
- struct iproc_gpio_platdata *plat = dev_get_platdata(dev);
+ struct iproc_gpio_platdata *plat = dev_get_plat(dev);
int value;
value = iproc_gpio_get_bit(plat, DATA_IN_OFFSET, gpio);
static int iproc_gpio_set_value(struct udevice *dev, u32 gpio, int value)
{
- struct iproc_gpio_platdata *plat = dev_get_platdata(dev);
+ struct iproc_gpio_platdata *plat = dev_get_plat(dev);
if (iproc_gpio_get_bit(plat, OUT_EN_OFFSET, gpio))
iproc_gpio_set_bit(plat, DATA_OUT_OFFSET, gpio, value);
static int iproc_gpio_get_function(struct udevice *dev, u32 gpio)
{
- struct iproc_gpio_platdata *plat = dev_get_platdata(dev);
+ struct iproc_gpio_platdata *plat = dev_get_plat(dev);
if (iproc_gpio_get_bit(plat, OUT_EN_OFFSET, gpio))
return GPIOF_OUTPUT;
static int iproc_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct iproc_gpio_platdata *plat = dev_get_platdata(dev);
+ struct iproc_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
int ret;
char name[10];
#if CONFIG_IS_ENABLED(OF_CONTROL)
static int mpc83xx_spisel_boot_ofdata_to_platdata(struct udevice *dev)
{
- struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
+ struct mpc8xxx_gpio_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
u32 reg[2];
static int mpc83xx_spisel_boot_platdata_to_priv(struct udevice *dev)
{
struct mpc83xx_spisel_boot *priv = dev_get_priv(dev);
- struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
+ struct mpc8xxx_gpio_plat *plat = dev_get_plat(dev);
unsigned long size = plat->size;
ulong driver_data = dev_get_driver_data(dev);
#if CONFIG_IS_ENABLED(OF_CONTROL)
static int mpc8xxx_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
+ struct mpc8xxx_gpio_plat *plat = dev_get_plat(dev);
struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
fdt_addr_t addr;
u32 i;
static int mpc8xxx_gpio_platdata_to_priv(struct udevice *dev)
{
struct mpc8xxx_gpio_data *priv = dev_get_priv(dev);
- struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
+ struct mpc8xxx_gpio_plat *plat = dev_get_plat(dev);
unsigned long size = plat->size;
ulong driver_data = dev_get_driver_data(dev);
static int mediatek_gpio_get_value(struct udevice *dev, unsigned int offset)
{
- struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+ struct mediatek_gpio_platdata *plat = dev_get_plat(dev);
return !!(ioread32(mediatek_gpio_membase +
reg_offs(plat, GPIO_REG_DATA)) & BIT(offset));
static int mediatek_gpio_set_value(struct udevice *dev, unsigned int offset,
int value)
{
- struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+ struct mediatek_gpio_platdata *plat = dev_get_plat(dev);
iowrite32(BIT(offset), mediatek_gpio_membase +
reg_offs(plat, value ? GPIO_REG_DSET : GPIO_REG_DCLR));
static int mediatek_gpio_direction_input(struct udevice *dev, unsigned int offset)
{
- struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+ struct mediatek_gpio_platdata *plat = dev_get_plat(dev);
clrbits_le32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL),
BIT(offset));
static int mediatek_gpio_direction_output(struct udevice *dev, unsigned int offset,
int value)
{
- struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+ struct mediatek_gpio_platdata *plat = dev_get_plat(dev);
setbits_le32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL),
BIT(offset));
static int mediatek_gpio_get_function(struct udevice *dev, unsigned int offset)
{
- struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+ struct mediatek_gpio_platdata *plat = dev_get_plat(dev);
u32 t;
t = ioread32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL));
static int gpio_mediatek_probe(struct udevice *dev)
{
- struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+ struct mediatek_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
/* Tell the uclass how many GPIOs we have */
static int mxc_gpio_probe(struct udevice *dev)
{
struct mxc_bank_info *bank = dev_get_priv(dev);
- struct mxc_gpio_plat *plat = dev_get_platdata(dev);
+ struct mxc_gpio_plat *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
int banknum;
char name[18], *str;
static int mxc_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct mxc_gpio_plat *plat = dev_get_platdata(dev);
+ struct mxc_gpio_plat *plat = dev_get_plat(dev);
if (!CONFIG_IS_ENABLED(OF_PLATDATA)) {
fdt_addr_t addr;
addr = dev_read_addr(dev);
static int mxs_gpio_probe(struct udevice *dev)
{
- struct mxs_gpio_platdata *plat = dev_get_platdata(dev);
+ struct mxs_gpio_platdata *plat = dev_get_plat(dev);
struct mxs_gpio_priv *priv = dev_get_priv(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
char name[16], *str;
static int nx_alive_gpio_is_check(struct udevice *dev)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
const char *bank_name = plat->bank_name;
if (!strcmp(bank_name, "gpio_alv"))
static int nx_alive_gpio_direction_input(struct udevice *dev, unsigned int pin)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_alive_gpio_regs *const regs = plat->regs;
setbits_le32(®s->outputenb_reset, 1 << pin);
static int nx_alive_gpio_direction_output(struct udevice *dev, unsigned int pin,
int val)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_alive_gpio_regs *const regs = plat->regs;
if (val)
static int nx_alive_gpio_get_value(struct udevice *dev, unsigned int pin)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_alive_gpio_regs *const regs = plat->regs;
unsigned int mask = 1UL << pin;
unsigned int value;
static int nx_alive_gpio_set_value(struct udevice *dev, unsigned int pin,
int val)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_alive_gpio_regs *const regs = plat->regs;
if (val)
static int nx_alive_gpio_get_function(struct udevice *dev, unsigned int pin)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_alive_gpio_regs *const regs = plat->regs;
unsigned int mask = (1UL << pin);
unsigned int output;
static int nx_gpio_direction_input(struct udevice *dev, unsigned int pin)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_gpio_regs *const regs = plat->regs;
if (nx_alive_gpio_is_check(dev))
static int nx_gpio_direction_output(struct udevice *dev, unsigned int pin,
int val)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_gpio_regs *const regs = plat->regs;
if (nx_alive_gpio_is_check(dev))
static int nx_gpio_get_value(struct udevice *dev, unsigned int pin)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_gpio_regs *const regs = plat->regs;
unsigned int mask = 1UL << pin;
unsigned int value;
static int nx_gpio_set_value(struct udevice *dev, unsigned int pin, int val)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_gpio_regs *const regs = plat->regs;
if (nx_alive_gpio_is_check(dev))
static int nx_gpio_get_function(struct udevice *dev, unsigned int pin)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
struct nx_gpio_regs *const regs = plat->regs;
unsigned int mask = (1UL << pin);
unsigned int output;
static int nx_gpio_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
uc_priv->gpio_count = plat->gpio_count;
uc_priv->bank_name = plat->bank_name;
static int nx_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct nx_gpio_platdata *plat = dev_get_plat(dev);
plat->regs = map_physmem(devfdt_get_addr(dev),
sizeof(struct nx_gpio_regs),
static int omap_gpio_probe(struct udevice *dev)
{
struct gpio_bank *bank = dev_get_priv(dev);
- struct omap_gpio_platdata *plat = dev_get_platdata(dev);
+ struct omap_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
char name[18], *str;
#if !CONFIG_IS_ENABLED(OF_CONTROL)
static int omap_gpio_bind(struct udevice *dev)
{
- struct omap_gpio_platdata *plat = dev_get_platdata(dev);
+ struct omap_gpio_platdata *plat = dev_get_plat(dev);
fdt_addr_t base_addr;
if (plat)
static int omap_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct omap_gpio_platdata *plat = dev_get_platdata(dev);
+ struct omap_gpio_platdata *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);
static int pca953x_write_single(struct udevice *dev, int reg, u8 val,
int offset)
{
- struct pca953x_info *info = dev_get_platdata(dev);
+ struct pca953x_info *info = dev_get_plat(dev);
int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
int off = offset / BANK_SZ;
int ret = 0;
static int pca953x_read_single(struct udevice *dev, int reg, u8 *val,
int offset)
{
- struct pca953x_info *info = dev_get_platdata(dev);
+ struct pca953x_info *info = dev_get_plat(dev);
int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
int off = offset / BANK_SZ;
int ret;
static int pca953x_read_regs(struct udevice *dev, int reg, u8 *val)
{
- struct pca953x_info *info = dev_get_platdata(dev);
+ struct pca953x_info *info = dev_get_plat(dev);
int ret = 0;
if (info->gpio_count <= 8) {
static int pca953x_write_regs(struct udevice *dev, int reg, u8 *val)
{
- struct pca953x_info *info = dev_get_platdata(dev);
+ struct pca953x_info *info = dev_get_plat(dev);
int ret = 0;
if (info->gpio_count <= 8) {
static int pca953x_is_output(struct udevice *dev, int offset)
{
- struct pca953x_info *info = dev_get_platdata(dev);
+ struct pca953x_info *info = dev_get_plat(dev);
int bank = offset / BANK_SZ;
int off = offset % BANK_SZ;
static int pca953x_set_value(struct udevice *dev, uint offset, int value)
{
- struct pca953x_info *info = dev_get_platdata(dev);
+ struct pca953x_info *info = dev_get_plat(dev);
int bank = offset / BANK_SZ;
int off = offset % BANK_SZ;
u8 val;
static int pca953x_set_direction(struct udevice *dev, uint offset, int dir)
{
- struct pca953x_info *info = dev_get_platdata(dev);
+ struct pca953x_info *info = dev_get_plat(dev);
int bank = offset / BANK_SZ;
int off = offset % BANK_SZ;
u8 val;
static int pca953x_probe(struct udevice *dev)
{
- struct pca953x_info *info = dev_get_platdata(dev);
+ struct pca953x_info *info = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
char name[32], label[8], *str;
int addr;
static int pcf8575_direction_input(struct udevice *dev, unsigned offset)
{
- struct pcf8575_chip *plat = dev_get_platdata(dev);
+ struct pcf8575_chip *plat = dev_get_plat(dev);
int status;
plat->out |= BIT(offset);
static int pcf8575_direction_output(struct udevice *dev,
unsigned int offset, int value)
{
- struct pcf8575_chip *plat = dev_get_platdata(dev);
+ struct pcf8575_chip *plat = dev_get_plat(dev);
int ret;
if (value)
static int pcf8575_ofdata_platdata(struct udevice *dev)
{
- struct pcf8575_chip *plat = dev_get_platdata(dev);
+ struct pcf8575_chip *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
int n_latch;
static int sifive_gpio_probe(struct udevice *dev)
{
- struct sifive_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sifive_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
char name[18], *str;
static int sifive_gpio_direction_input(struct udevice *dev, u32 offset)
{
- struct sifive_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sifive_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
if (offset > uc_priv->gpio_count)
static int sifive_gpio_direction_output(struct udevice *dev, u32 offset,
int value)
{
- struct sifive_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sifive_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
if (offset > uc_priv->gpio_count)
static int sifive_gpio_get_value(struct udevice *dev, u32 offset)
{
- struct sifive_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sifive_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
int val;
int dir;
static int sifive_gpio_set_value(struct udevice *dev, u32 offset, int value)
{
- struct sifive_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sifive_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
if (offset > uc_priv->gpio_count)
static int sifive_gpio_get_function(struct udevice *dev, unsigned int offset)
{
- struct sifive_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sifive_gpio_platdata *plat = dev_get_plat(dev);
u32 outdir, indir, val;
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
static int sifive_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct sifive_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sifive_gpio_platdata *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);
static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)
{
- struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sunxi_gpio_platdata *plat = dev_get_plat(dev);
sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
static int sunxi_gpio_direction_output(struct udevice *dev, unsigned offset,
int value)
{
- struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sunxi_gpio_platdata *plat = dev_get_plat(dev);
u32 num = GPIO_NUM(offset);
sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
{
- struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sunxi_gpio_platdata *plat = dev_get_plat(dev);
u32 num = GPIO_NUM(offset);
unsigned dat;
static int sunxi_gpio_set_value(struct udevice *dev, unsigned offset,
int value)
{
- struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sunxi_gpio_platdata *plat = dev_get_plat(dev);
u32 num = GPIO_NUM(offset);
clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
{
- struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sunxi_gpio_platdata *plat = dev_get_plat(dev);
int func;
func = sunxi_gpio_get_cfgbank(plat->regs, offset);
static int gpio_sunxi_probe(struct udevice *dev)
{
- struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
+ struct sunxi_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
/* Tell the uclass how many GPIOs we have */
static int vybrid_gpio_probe(struct udevice *dev)
{
struct vybrid_gpios *gpios = dev_get_priv(dev);
- struct vybrid_gpio_platdata *plat = dev_get_platdata(dev);
+ struct vybrid_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
uc_priv->bank_name = plat->port_name;
static int vybrid_gpio_odata_to_platdata(struct udevice *dev)
{
- struct vybrid_gpio_platdata *plat = dev_get_platdata(dev);
+ struct vybrid_gpio_platdata *plat = dev_get_plat(dev);
fdt_addr_t base_addr;
base_addr = dev_read_addr(dev);
static int xilinx_gpio_get_bank_pin(unsigned offset, u32 *bank_num,
u32 *bank_pin_num, struct udevice *dev)
{
- struct xilinx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct xilinx_gpio_platdata *plat = dev_get_plat(dev);
u32 bank, max_pins;
/* the first gpio is 0 not 1 */
u32 pin_num = offset;
static int xilinx_gpio_set_value(struct udevice *dev, unsigned offset,
int value)
{
- struct xilinx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct xilinx_gpio_platdata *plat = dev_get_plat(dev);
struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
int val, ret;
u32 bank, pin;
static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)
{
- struct xilinx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct xilinx_gpio_platdata *plat = dev_get_plat(dev);
struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
int val, ret;
u32 bank, pin;
static int xilinx_gpio_get_function(struct udevice *dev, unsigned offset)
{
- struct xilinx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct xilinx_gpio_platdata *plat = dev_get_plat(dev);
int val, ret;
u32 bank, pin;
static int xilinx_gpio_direction_output(struct udevice *dev, unsigned offset,
int value)
{
- struct xilinx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct xilinx_gpio_platdata *plat = dev_get_plat(dev);
int val, ret;
u32 bank, pin;
static int xilinx_gpio_direction_input(struct udevice *dev, unsigned offset)
{
- struct xilinx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct xilinx_gpio_platdata *plat = dev_get_plat(dev);
int val, ret;
u32 bank, pin;
static int xilinx_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
struct ofnode_phandle_args *args)
{
- struct xilinx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct xilinx_gpio_platdata *plat = dev_get_plat(dev);
desc->offset = args->args[0];
static int xilinx_gpio_probe(struct udevice *dev)
{
- struct xilinx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct xilinx_gpio_platdata *plat = dev_get_plat(dev);
struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
const void *label_ptr;
static int xilinx_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct xilinx_gpio_platdata *plat = dev_get_platdata(dev);
+ struct xilinx_gpio_platdata *plat = dev_get_plat(dev);
int is_dual;
plat->regs = (struct gpio_regs *)dev_read_addr(dev);
unsigned int *bank_pin_num,
struct udevice *dev)
{
- struct zynq_gpio_platdata *plat = dev_get_platdata(dev);
+ struct zynq_gpio_platdata *plat = dev_get_plat(dev);
u32 bank;
for (bank = 0; bank < plat->p_data->max_bank; bank++) {
static int gpio_is_valid(unsigned gpio, struct udevice *dev)
{
- struct zynq_gpio_platdata *plat = dev_get_platdata(dev);
+ struct zynq_gpio_platdata *plat = dev_get_plat(dev);
return gpio < plat->p_data->ngpio;
}
{
u32 data;
unsigned int bank_num, bank_pin_num;
- struct zynq_gpio_platdata *plat = dev_get_platdata(dev);
+ struct zynq_gpio_platdata *plat = dev_get_plat(dev);
if (check_gpio(gpio, dev) < 0)
return -1;
static int zynq_gpio_set_value(struct udevice *dev, unsigned gpio, int value)
{
unsigned int reg_offset, bank_num, bank_pin_num;
- struct zynq_gpio_platdata *plat = dev_get_platdata(dev);
+ struct zynq_gpio_platdata *plat = dev_get_plat(dev);
if (check_gpio(gpio, dev) < 0)
return -1;
{
u32 reg;
unsigned int bank_num, bank_pin_num;
- struct zynq_gpio_platdata *plat = dev_get_platdata(dev);
+ struct zynq_gpio_platdata *plat = dev_get_plat(dev);
if (check_gpio(gpio, dev) < 0)
return -1;
{
u32 reg;
unsigned int bank_num, bank_pin_num;
- struct zynq_gpio_platdata *plat = dev_get_platdata(dev);
+ struct zynq_gpio_platdata *plat = dev_get_plat(dev);
if (check_gpio(gpio, dev) < 0)
return -1;
{
u32 reg;
unsigned int bank_num, bank_pin_num;
- struct zynq_gpio_platdata *plat = dev_get_platdata(dev);
+ struct zynq_gpio_platdata *plat = dev_get_plat(dev);
if (check_gpio(offset, dev) < 0)
return -1;
static int zynq_gpio_probe(struct udevice *dev)
{
- struct zynq_gpio_platdata *plat = dev_get_platdata(dev);
+ struct zynq_gpio_platdata *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
const void *label_ptr;
static int zynq_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct zynq_gpio_platdata *plat = dev_get_platdata(dev);
+ struct zynq_gpio_platdata *plat = dev_get_plat(dev);
plat->base = (phys_addr_t)dev_read_addr(dev);
#else /* CONFIG_DM_I2C */
static int lpc32xx_i2c_probe(struct udevice *bus)
{
- struct lpc32xx_i2c_dev *dev = dev_get_platdata(bus);
+ struct lpc32xx_i2c_dev *dev = dev_get_plat(bus);
bus->seq = dev->index;
__i2c_init(dev->base, dev->speed, 0, dev->index);
static int lpc32xx_i2c_probe_chip(struct udevice *bus, u32 chip_addr,
u32 chip_flags)
{
- struct lpc32xx_i2c_dev *dev = dev_get_platdata(bus);
+ struct lpc32xx_i2c_dev *dev = dev_get_plat(bus);
return __i2c_probe_chip(dev->base, chip_addr);
}
static int lpc32xx_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
int nmsgs)
{
- struct lpc32xx_i2c_dev *dev = dev_get_platdata(bus);
+ struct lpc32xx_i2c_dev *dev = dev_get_plat(bus);
struct i2c_msg *dmsg, *omsg, dummy;
uint i = 0, address = 0;
static int lpc32xx_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
{
- struct lpc32xx_i2c_dev *dev = dev_get_platdata(bus);
+ struct lpc32xx_i2c_dev *dev = dev_get_plat(bus);
return __i2c_set_bus_speed(dev->base, speed, dev->index);
}
static int lpc32xx_i2c_reset(struct udevice *bus)
{
- struct lpc32xx_i2c_dev *dev = dev_get_platdata(bus);
+ struct lpc32xx_i2c_dev *dev = dev_get_plat(bus);
__i2c_init(dev->base, dev->speed, 0, dev->index);
return 0;
static int omap_i2c_probe(struct udevice *bus)
{
struct omap_i2c *priv = dev_get_priv(bus);
- struct omap_i2c_platdata *plat = dev_get_platdata(bus);
+ struct omap_i2c_platdata *plat = dev_get_plat(bus);
priv->speed = plat->speed;
priv->regs = map_physmem(plat->base, sizeof(void *),
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static int omap_i2c_ofdata_to_platdata(struct udevice *bus)
{
- struct omap_i2c_platdata *plat = dev_get_platdata(bus);
+ struct omap_i2c_platdata *plat = dev_get_plat(bus);
plat->base = dev_read_addr(bus);
plat->speed = dev_read_u32_default(bus, "clock-frequency",
/* Top-level LED node */
if (!uc_plat->label) {
- struct cortina_led_platdata *plt = dev_get_platdata(dev);
+ struct cortina_led_platdata *plt = dev_get_plat(dev);
plt->rate1 =
dev_read_u32_default(dev, "Cortina,blink-rate1", 256);
/* Top-level LED node */
if (!uc_plat->label) {
- struct cortina_led_platdata *plat = dev_get_platdata(dev);
+ struct cortina_led_platdata *plat = dev_get_plat(dev);
u32 reg_value, val;
u16 rate1, rate2;
static int altera_sysid_ofdata_to_platdata(struct udevice *dev)
{
- struct altera_sysid_platdata *plat = dev_get_platdata(dev);
+ struct altera_sysid_platdata *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev),
sizeof(struct altera_sysid_regs),
void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev,
enum sandbox_i2c_eeprom_test_mode mode)
{
- struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_plat(dev);
plat->test_mode = mode;
}
void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len)
{
- struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_plat(dev);
plat->offset_len = offset_len;
}
void sandbox_i2c_eeprom_set_chip_addr_offset_mask(struct udevice *dev,
uint mask)
{
- struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_plat(dev);
plat->chip_addr_offset_mask = mask;
}
int nmsgs)
{
struct sandbox_i2c_flash *priv = dev_get_priv(emul);
- struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(emul);
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_plat(emul);
uint offset = msg->addr & plat->chip_addr_offset_mask;
debug("\n%s\n", __func__);
static int sandbox_i2c_eeprom_ofdata_to_platdata(struct udevice *dev)
{
- struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_plat(dev);
plat->size = dev_read_u32_default(dev, "sandbox,size", 32);
plat->filename = dev_read_string(dev, "sandbox,filename");
static int sandbox_i2c_eeprom_probe(struct udevice *dev)
{
- struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_plat(dev);
struct sandbox_i2c_flash *priv = dev_get_priv(dev);
priv->data = calloc(1, plat->size);
static int imx8_scu_call(struct udevice *dev, int no_resp, void *tx_msg,
int tx_size, void *rx_msg, int rx_size)
{
- struct imx8_scu *plat = dev_get_platdata(dev);
+ struct imx8_scu *plat = dev_get_plat(dev);
sc_err_t result;
int ret;
static int imx8_scu_probe(struct udevice *dev)
{
- struct imx8_scu *plat = dev_get_platdata(dev);
+ struct imx8_scu *plat = dev_get_plat(dev);
fdt_addr_t addr;
debug("%s(dev=%p) (plat=%p)\n", __func__, dev, plat);
static int microchip_flexcom_ofdata_to_platdata(struct udevice *dev)
{
- struct microchip_flexcom_platdata *plat = dev_get_platdata(dev);
+ struct microchip_flexcom_platdata *plat = dev_get_plat(dev);
int ret;
plat->regs = map_physmem(dev_read_addr(dev),
uint offset, ulong *valuep,
enum pci_size_t size)
{
- struct p2sb_emul_platdata *plat = dev_get_platdata(emul);
+ struct p2sb_emul_platdata *plat = dev_get_plat(emul);
switch (offset) {
case PCI_COMMAND:
static int sandbox_p2sb_emul_write_config(struct udevice *emul, uint offset,
ulong value, enum pci_size_t size)
{
- struct p2sb_emul_platdata *plat = dev_get_platdata(emul);
+ struct p2sb_emul_platdata *plat = dev_get_plat(emul);
switch (offset) {
case PCI_COMMAND:
static int sandbox_p2sb_emul_find_bar(struct udevice *emul, unsigned int addr,
int *barnump, unsigned int *offsetp)
{
- struct p2sb_emul_platdata *plat = dev_get_platdata(emul);
+ struct p2sb_emul_platdata *plat = dev_get_plat(emul);
int barnum;
for (barnum = 0; barnum < ARRAY_SIZE(barinfo); barnum++) {
static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
- struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+ struct rockchip_efuse_platdata *plat = dev_get_plat(dev);
struct rockchip_efuse_regs *efuse =
(struct rockchip_efuse_regs *)plat->base;
static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
{
- struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+ struct rockchip_efuse_platdata *plat = dev_get_plat(dev);
plat->base = dev_read_addr_ptr(dev);
return 0;
static int rockchip_px30_otp_read(struct udevice *dev, int offset,
void *buf, int size)
{
- struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+ struct rockchip_otp_platdata *otp = dev_get_plat(dev);
u8 *buffer = buf;
int ret = 0;
static int rockchip_otp_ofdata_to_platdata(struct udevice *dev)
{
- struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+ struct rockchip_otp_platdata *otp = dev_get_plat(dev);
otp->base = dev_read_addr_ptr(dev);
static int sifive_otp_read(struct udevice *dev, int offset,
void *buf, int size)
{
- struct sifive_otp_platdata *plat = dev_get_platdata(dev);
+ struct sifive_otp_platdata *plat = dev_get_plat(dev);
struct sifive_otp_regs *regs = (struct sifive_otp_regs *)plat->regs;
/* Check if offset and size are multiple of BYTES_PER_FUSE */
static int sifive_otp_write(struct udevice *dev, int offset,
const void *buf, int size)
{
- struct sifive_otp_platdata *plat = dev_get_platdata(dev);
+ struct sifive_otp_platdata *plat = dev_get_plat(dev);
struct sifive_otp_regs *regs = (struct sifive_otp_regs *)plat->regs;
/* Check if offset and size are multiple of BYTES_PER_FUSE */
static int sifive_otp_ofdata_to_platdata(struct udevice *dev)
{
- struct sifive_otp_platdata *plat = dev_get_platdata(dev);
+ struct sifive_otp_platdata *plat = dev_get_plat(dev);
int ret;
plat->regs = dev_read_addr_ptr(dev);
uint offset, ulong *valuep,
enum pci_size_t size)
{
- struct swap_case_platdata *plat = dev_get_platdata(emul);
+ struct swap_case_platdata *plat = dev_get_plat(emul);
/*
* The content of the EA capability structure is handled elsewhere to
static int sandbox_swap_case_write_config(struct udevice *emul, uint offset,
ulong value, enum pci_size_t size)
{
- struct swap_case_platdata *plat = dev_get_platdata(emul);
+ struct swap_case_platdata *plat = dev_get_plat(emul);
switch (offset) {
case PCI_COMMAND:
static int sandbox_swap_case_find_bar(struct udevice *emul, unsigned int addr,
int *barnump, unsigned int *offsetp)
{
- struct swap_case_platdata *plat = dev_get_platdata(emul);
+ struct swap_case_platdata *plat = dev_get_plat(emul);
int barnum;
for (barnum = 0; barnum < ARRAY_SIZE(barinfo); barnum++) {
static int am654_sdhci_set_ios_post(struct sdhci_host *host)
{
struct udevice *dev = host->mmc->dev;
- struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ struct am654_sdhci_plat *plat = dev_get_plat(dev);
unsigned int speed = host->mmc->clock;
int sel50, sel100, freqsel;
u32 otap_del_sel;
static int am654_sdhci_deferred_probe(struct sdhci_host *host)
{
struct udevice *dev = host->mmc->dev;
- struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ struct am654_sdhci_plat *plat = dev_get_plat(dev);
unsigned long start;
int val;
static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
{
struct udevice *dev = host->mmc->dev;
- struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ struct am654_sdhci_plat *plat = dev_get_plat(dev);
u32 otap_del_sel, mask, val;
otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
static int sdhci_am654_get_otap_delay(struct udevice *dev,
struct mmc_config *cfg)
{
- struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ struct am654_sdhci_plat *plat = dev_get_plat(dev);
int ret;
int i;
{
struct am654_driver_data *drv_data =
(struct am654_driver_data *)dev_get_driver_data(dev);
- struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ struct am654_sdhci_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct sdhci_host *host = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)
{
- struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ struct am654_sdhci_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
u32 drv_strength;
{
struct am654_driver_data *drv_data =
(struct am654_driver_data *)dev_get_driver_data(dev);
- struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ struct am654_sdhci_plat *plat = dev_get_plat(dev);
plat->flags = drv_data->flags;
static int arm_pl180_mmc_probe(struct udevice *dev)
{
- struct arm_pl180_mmc_plat *pdata = dev_get_platdata(dev);
+ struct arm_pl180_mmc_plat *pdata = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct mmc *mmc = &pdata->mmc;
struct pl180_mmc_host *host = dev->priv;
int arm_pl180_mmc_bind(struct udevice *dev)
{
- struct arm_pl180_mmc_plat *plat = dev_get_platdata(dev);
+ struct arm_pl180_mmc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int aspeed_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct aspeed_sdhci_plat *plat = dev_get_platdata(dev);
+ struct aspeed_sdhci_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
u32 max_clk;
struct clk clk;
static int aspeed_sdhci_bind(struct udevice *dev)
{
- struct aspeed_sdhci_plat *plat = dev_get_platdata(dev);
+ struct aspeed_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int atmel_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct atmel_sdhci_plat *plat = dev_get_platdata(dev);
+ struct atmel_sdhci_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
u32 max_clk;
struct clk clk;
static int atmel_sdhci_bind(struct udevice *dev)
{
- struct atmel_sdhci_plat *plat = dev_get_platdata(dev);
+ struct atmel_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int bcm2835_sdhci_bind(struct udevice *dev)
{
- struct bcm2835_sdhci_plat *plat = dev_get_platdata(dev);
+ struct bcm2835_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int bcm2835_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct bcm2835_sdhci_plat *plat = dev_get_platdata(dev);
+ struct bcm2835_sdhci_plat *plat = dev_get_plat(dev);
struct bcm2835_sdhci_host *priv = dev_get_priv(dev);
struct sdhci_host *host = &priv->host;
fdt_addr_t base;
static int bcm2835_probe(struct udevice *dev)
{
- struct bcm2835_plat *plat = dev_get_platdata(dev);
+ struct bcm2835_plat *plat = dev_get_plat(dev);
struct bcm2835_host *host = dev_get_priv(dev);
struct mmc *mmc = mmc_get_mmc_dev(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
static int bcm2835_bind(struct udevice *dev)
{
- struct bcm2835_plat *plat = dev_get_platdata(dev);
+ struct bcm2835_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int sdhci_bcmstb_bind(struct udevice *dev)
{
- struct sdhci_bcmstb_plat *plat = dev_get_platdata(dev);
+ struct sdhci_bcmstb_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int sdhci_bcmstb_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct sdhci_bcmstb_plat *plat = dev_get_platdata(dev);
+ struct sdhci_bcmstb_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
fdt_addr_t base;
int ret;
static int ca_dwmmc_probe(struct udevice *dev)
{
- struct ca_mmc_plat *plat = dev_get_platdata(dev);
+ struct ca_mmc_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct ca_dwmmc_priv_data *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
static int ca_dwmmc_bind(struct udevice *dev)
{
- struct ca_mmc_plat *plat = dev_get_platdata(dev);
+ struct ca_mmc_plat *plat = dev_get_plat(dev);
return dwmci_bind(dev, &plat->mmc, &plat->cfg);
}
static int davinci_mmc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct davinci_mmc_plat *plat = dev_get_platdata(dev);
+ struct davinci_mmc_plat *plat = dev_get_plat(dev);
struct davinci_mmc_priv *priv = dev_get_priv(dev);
priv->reg_base = plat->reg_base;
static int davinci_mmc_bind(struct udevice *dev)
{
- struct davinci_mmc_plat *plat = dev_get_platdata(dev);
+ struct davinci_mmc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
#if CONFIG_IS_ENABLED(OF_CONTROL)
static int davinci_mmc_ofdata_to_platdata(struct udevice *dev)
{
- struct davinci_mmc_plat *plat = dev_get_platdata(dev);
+ struct davinci_mmc_plat *plat = dev_get_plat(dev);
struct mmc_config *cfg = &plat->cfg;
plat->reg_base = (struct davinci_mmc_regs *)dev_read_addr(dev);
#ifdef CONFIG_DM_MMC
static int exynos_dwmmc_probe(struct udevice *dev)
{
- struct exynos_mmc_plat *plat = dev_get_platdata(dev);
+ struct exynos_mmc_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct dwmci_exynos_priv_data *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
static int exynos_dwmmc_bind(struct udevice *dev)
{
- struct exynos_mmc_plat *plat = dev_get_platdata(dev);
+ struct exynos_mmc_plat *plat = dev_get_plat(dev);
return dwmci_bind(dev, &plat->mmc, &plat->cfg);
}
static int fsl_esdhc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
u32 caps, hostver;
fdt_addr_t addr;
static int fsl_esdhc_get_cd(struct udevice *dev)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
if (plat->cfg.host_caps & MMC_CAP_NONREMOVABLE)
static int fsl_esdhc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
return esdhc_send_cmd_common(priv, &plat->mmc, cmd, data);
static int fsl_esdhc_set_ios(struct udevice *dev)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
return esdhc_set_ios_common(priv, &plat->mmc);
static int fsl_esdhc_reinit(struct udevice *dev)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
return esdhc_init_common(priv, &plat->mmc);
#ifdef MMC_SUPPORTS_TUNING
static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
struct fsl_esdhc *regs = priv->esdhc_regs;
u32 val, irqstaten;
static int fsl_esdhc_bind(struct udevice *dev)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
struct fsl_esdhc *regs = priv->esdhc_regs;
struct mmc *mmc = &plat->mmc;
static int fsl_esdhc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
struct esdhc_soc_data *data =
(struct esdhc_soc_data *)dev_get_driver_data(dev);
static int fsl_esdhc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
return esdhc_send_cmd_common(priv, &plat->mmc, cmd, data);
static int fsl_esdhc_set_ios(struct udevice *dev)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
return esdhc_set_ios_common(priv, &plat->mmc);
#if CONFIG_IS_ENABLED(BLK)
static int fsl_esdhc_bind(struct udevice *dev)
{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int ftsdc010_mmc_probe(struct udevice *dev)
{
- struct ftsdc010_plat *plat = dev_get_platdata(dev);
+ struct ftsdc010_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct ftsdc_priv *priv = dev_get_priv(dev);
struct ftsdc010_chip *chip = &priv->chip;
int ftsdc010_mmc_bind(struct udevice *dev)
{
- struct ftsdc010_plat *plat = dev_get_platdata(dev);
+ struct ftsdc010_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
#ifdef CONFIG_DM_MMC
static void mci_set_mode(struct udevice *dev, u32 hz, u32 blklen)
{
- struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ struct atmel_mci_plat *plat = dev_get_plat(dev);
struct atmel_mci_priv *priv = dev_get_priv(dev);
struct mmc *mmc = &plat->mmc;
u32 bus_hz = priv->bus_clk_rate;
static int atmel_mci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
- struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ struct atmel_mci_plat *plat = dev_get_plat(dev);
struct atmel_mci_priv *priv = dev_get_priv(dev);
atmel_mci_t *mci = plat->mci;
#else
#ifdef CONFIG_DM_MMC
static int atmel_mci_set_ios(struct udevice *dev)
{
- struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ struct atmel_mci_plat *plat = dev_get_plat(dev);
struct mmc *mmc = mmc_get_mmc_dev(dev);
atmel_mci_t *mci = plat->mci;
#else
#ifdef CONFIG_DM_MMC
static int atmel_mci_hw_init(struct udevice *dev)
{
- struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ struct atmel_mci_plat *plat = dev_get_plat(dev);
atmel_mci_t *mci = plat->mci;
#else
/* Entered into mmc structure during driver init */
static void atmel_mci_setup_cfg(struct udevice *dev)
{
- struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ struct atmel_mci_plat *plat = dev_get_plat(dev);
struct atmel_mci_priv *priv = dev_get_priv(dev);
struct mmc_config *cfg;
u32 version;
static int atmel_mci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ struct atmel_mci_plat *plat = dev_get_plat(dev);
struct mmc *mmc;
int ret;
static int atmel_mci_bind(struct udevice *dev)
{
- struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ struct atmel_mci_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int hi6220_dwmmc_probe(struct udevice *dev)
{
- struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev);
+ struct hi6220_dwmmc_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
static int hi6220_dwmmc_bind(struct udevice *dev)
{
- struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev);
+ struct hi6220_dwmmc_plat *plat = dev_get_plat(dev);
int ret;
ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
static int iproc_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct iproc_sdhci_plat *plat = dev_get_platdata(dev);
+ struct iproc_sdhci_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
struct sdhci_iproc_host *iproc_host;
int node = dev_of_offset(dev);
static int iproc_sdhci_bind(struct udevice *dev)
{
- struct iproc_sdhci_plat *plat = dev_get_platdata(dev);
+ struct iproc_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int jz_mmc_ofdata_to_platdata(struct udevice *dev)
{
struct jz_mmc_priv *priv = dev_get_priv(dev);
- struct jz_mmc_plat *plat = dev_get_platdata(dev);
+ struct jz_mmc_plat *plat = dev_get_plat(dev);
struct mmc_config *cfg;
int ret;
static int jz_mmc_bind(struct udevice *dev)
{
- struct jz_mmc_plat *plat = dev_get_platdata(dev);
+ struct jz_mmc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct jz_mmc_priv *priv = dev_get_priv(dev);
- struct jz_mmc_plat *plat = dev_get_platdata(dev);
+ struct jz_mmc_plat *plat = dev_get_plat(dev);
plat->mmc.priv = priv;
upriv->mmc = &plat->mmc;
static int meson_mmc_ofdata_to_platdata(struct udevice *dev)
{
- struct meson_mmc_platdata *pdata = dev_get_platdata(dev);
+ struct meson_mmc_platdata *pdata = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);
static int meson_mmc_probe(struct udevice *dev)
{
- struct meson_mmc_platdata *pdata = dev_get_platdata(dev);
+ struct meson_mmc_platdata *pdata = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct mmc *mmc = &pdata->mmc;
struct mmc_config *cfg = &pdata->cfg;
int meson_mmc_bind(struct udevice *dev)
{
- struct meson_mmc_platdata *pdata = dev_get_platdata(dev);
+ struct meson_mmc_platdata *pdata = dev_get_plat(dev);
return mmc_bind(dev, &pdata->mmc, &pdata->cfg);
}
static int mmc_spi_probe(struct udevice *dev)
{
struct mmc_spi_priv *priv = dev_get_priv(dev);
- struct mmc_spi_plat *plat = dev_get_platdata(dev);
+ struct mmc_spi_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
char *name;
static int mmc_spi_bind(struct udevice *dev)
{
- struct mmc_spi_plat *plat = dev_get_platdata(dev);
+ struct mmc_spi_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int msm_sdc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct msm_sdhc_plat *plat = dev_get_platdata(dev);
+ struct msm_sdhc_plat *plat = dev_get_plat(dev);
struct msm_sdhc *prv = dev_get_priv(dev);
struct sdhci_host *host = &prv->host;
u32 core_version, core_minor, core_major;
static int msm_sdc_bind(struct udevice *dev)
{
- struct msm_sdhc_plat *plat = dev_get_platdata(dev);
+ struct msm_sdhc_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int msdc_ops_set_ios(struct udevice *dev)
{
- struct msdc_plat *plat = dev_get_platdata(dev);
+ struct msdc_plat *plat = dev_get_plat(dev);
struct msdc_host *host = dev_get_priv(dev);
struct mmc *mmc = &plat->mmc;
uint clock = mmc->clock;
static int hs400_tune_response(struct udevice *dev, u32 opcode)
{
- struct msdc_plat *plat = dev_get_platdata(dev);
+ struct msdc_plat *plat = dev_get_plat(dev);
struct msdc_host *host = dev_get_priv(dev);
struct mmc *mmc = &plat->mmc;
u32 cmd_delay = 0;
static int msdc_tune_response(struct udevice *dev, u32 opcode)
{
- struct msdc_plat *plat = dev_get_platdata(dev);
+ struct msdc_plat *plat = dev_get_plat(dev);
struct msdc_host *host = dev_get_priv(dev);
struct mmc *mmc = &plat->mmc;
u32 rise_delay = 0, fall_delay = 0;
static int msdc_tune_data(struct udevice *dev, u32 opcode)
{
- struct msdc_plat *plat = dev_get_platdata(dev);
+ struct msdc_plat *plat = dev_get_plat(dev);
struct msdc_host *host = dev_get_priv(dev);
struct mmc *mmc = &plat->mmc;
u32 rise_delay = 0, fall_delay = 0;
*/
static int msdc_tune_together(struct udevice *dev, u32 opcode)
{
- struct msdc_plat *plat = dev_get_platdata(dev);
+ struct msdc_plat *plat = dev_get_plat(dev);
struct msdc_host *host = dev_get_priv(dev);
struct mmc *mmc = &plat->mmc;
u32 rise_delay = 0, fall_delay = 0;
static int msdc_execute_tuning(struct udevice *dev, uint opcode)
{
- struct msdc_plat *plat = dev_get_platdata(dev);
+ struct msdc_plat *plat = dev_get_plat(dev);
struct msdc_host *host = dev_get_priv(dev);
struct mmc *mmc = &plat->mmc;
int ret = 0;
static int msdc_drv_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct msdc_plat *plat = dev_get_platdata(dev);
+ struct msdc_plat *plat = dev_get_plat(dev);
struct msdc_host *host = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
static int msdc_ofdata_to_platdata(struct udevice *dev)
{
- struct msdc_plat *plat = dev_get_platdata(dev);
+ struct msdc_plat *plat = dev_get_plat(dev);
struct msdc_host *host = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
fdt_addr_t base, top_base;
static int msdc_drv_bind(struct udevice *dev)
{
- struct msdc_plat *plat = dev_get_platdata(dev);
+ struct msdc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int mv_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct mv_sdhci_plat *plat = dev_get_platdata(dev);
+ struct mv_sdhci_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
int ret;
static int mv_sdhci_bind(struct udevice *dev)
{
- struct mv_sdhci_plat *plat = dev_get_platdata(dev);
+ struct mv_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int
mxsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data)
{
- struct mxsmmc_platdata *plat = dev_get_platdata(dev);
+ struct mxsmmc_platdata *plat = dev_get_plat(dev);
struct mxsmmc_priv *priv = dev_get_priv(dev);
struct mxs_ssp_regs *ssp_regs = priv->regs;
struct mmc *mmc = &plat->mmc;
static int mxsmmc_get_cd(struct udevice *dev)
{
- struct mxsmmc_platdata *plat = dev_get_platdata(dev);
+ struct mxsmmc_platdata *plat = dev_get_plat(dev);
struct mxsmmc_priv *priv = dev_get_priv(dev);
struct mxs_ssp_regs *ssp_regs = priv->regs;
static int mxsmmc_set_ios(struct udevice *dev)
{
- struct mxsmmc_platdata *plat = dev_get_platdata(dev);
+ struct mxsmmc_platdata *plat = dev_get_plat(dev);
struct mxsmmc_priv *priv = dev_get_priv(dev);
struct mxs_ssp_regs *ssp_regs = priv->regs;
struct mmc *mmc = &plat->mmc;
static int mxsmmc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct mxsmmc_platdata *plat = dev_get_platdata(dev);
+ struct mxsmmc_platdata *plat = dev_get_plat(dev);
struct mxsmmc_priv *priv = dev_get_priv(dev);
struct blk_desc *bdesc;
struct mmc *mmc;
#if CONFIG_IS_ENABLED(BLK)
static int mxsmmc_bind(struct udevice *dev)
{
- struct mxsmmc_platdata *plat = dev_get_platdata(dev);
+ struct mxsmmc_platdata *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int nexell_dwmmc_probe(struct udevice *dev)
{
- struct nexell_mmc_plat *plat = dev_get_platdata(dev);
+ struct nexell_mmc_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct nexell_dwmmc_priv *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
static int nexell_dwmmc_bind(struct udevice *dev)
{
- struct nexell_mmc_plat *plat = dev_get_platdata(dev);
+ struct nexell_mmc_plat *plat = dev_get_plat(dev);
return dwmci_bind(dev, &plat->mmc, &plat->cfg);
}
static inline struct mmc_config *omap_hsmmc_get_cfg(struct mmc *mmc)
{
#if CONFIG_IS_ENABLED(DM_MMC)
- struct omap_hsmmc_plat *plat = dev_get_platdata(mmc->dev);
+ struct omap_hsmmc_plat *plat = dev_get_plat(mmc->dev);
return &plat->cfg;
#else
return &((struct omap_hsmmc_data *)mmc->priv)->cfg;
static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev)
{
- struct omap_hsmmc_plat *plat = dev_get_platdata(dev);
+ struct omap_hsmmc_plat *plat = dev_get_plat(dev);
struct omap_mmc_of_data *of_data = (void *)dev_get_driver_data(dev);
struct mmc_config *cfg = &plat->cfg;
static int omap_hsmmc_bind(struct udevice *dev)
{
- struct omap_hsmmc_plat *plat = dev_get_platdata(dev);
+ struct omap_hsmmc_plat *plat = dev_get_plat(dev);
plat->mmc = calloc(1, sizeof(struct mmc));
return mmc_bind(dev, plat->mmc, &plat->cfg);
}
#endif
static int omap_hsmmc_probe(struct udevice *dev)
{
- struct omap_hsmmc_plat *plat = dev_get_platdata(dev);
+ struct omap_hsmmc_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct omap_hsmmc_data *priv = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
static int pci_mmc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct pci_mmc_plat *plat = dev_get_platdata(dev);
+ struct pci_mmc_plat *plat = dev_get_plat(dev);
struct pci_mmc_priv *priv = dev_get_priv(dev);
struct sdhci_host *host = &priv->host;
int ret;
static int pci_mmc_bind(struct udevice *dev)
{
- struct pci_mmc_plat *plat = dev_get_platdata(dev);
+ struct pci_mmc_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int pic32_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct pic32_sdhci_plat *plat = dev_get_platdata(dev);
+ struct pic32_sdhci_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
struct clk clk;
static int pic32_sdhci_bind(struct udevice *dev)
{
- struct pic32_sdhci_plat *plat = dev_get_platdata(dev);
+ struct pic32_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int pxa_mmc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct pxa_mmc_plat *plat = dev_get_platdata(dev);
+ struct pxa_mmc_plat *plat = dev_get_plat(dev);
struct mmc_config *cfg = &plat->cfg;
struct mmc *mmc = &plat->mmc;
struct pxa_mmc_priv *priv = dev_get_priv(dev);
static int pxa_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
- struct pxa_mmc_plat *plat = dev_get_platdata(dev);
+ struct pxa_mmc_plat *plat = dev_get_plat(dev);
struct pxa_mmc_priv *priv = dev_get_priv(dev);
return pxa_mmc_send_cmd_common(priv, &plat->mmc, cmd, data);
static int pxa_mmc_set_ios(struct udevice *dev)
{
- struct pxa_mmc_plat *plat = dev_get_platdata(dev);
+ struct pxa_mmc_plat *plat = dev_get_plat(dev);
struct pxa_mmc_priv *priv = dev_get_priv(dev);
return pxa_mmc_set_ios_common(priv, &plat->mmc);
#if CONFIG_IS_ENABLED(BLK)
static int pxa_mmc_bind(struct udevice *dev)
{
- struct pxa_mmc_plat *plat = dev_get_platdata(dev);
+ struct pxa_mmc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
- struct tmio_sd_plat *plat = dev_get_platdata(dev);
+ struct tmio_sd_plat *plat = dev_get_plat(dev);
/* HS400 is not supported on H3 ES1.x and M3W ES1.0, ES1.1 */
if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
static int rockchip_dwmmc_probe(struct udevice *dev)
{
- struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_mmc_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
static int rockchip_dwmmc_bind(struct udevice *dev)
{
- struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_mmc_plat *plat = dev_get_plat(dev);
return dwmci_bind(dev, &plat->mmc, &plat->cfg);
}
static int arasan_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_sdhc_plat *plat = dev_get_plat(dev);
struct rockchip_sdhc *prv = dev_get_priv(dev);
struct sdhci_host *host = &prv->host;
int max_frequency, ret;
static int rockchip_sdhci_bind(struct udevice *dev)
{
- struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_sdhc_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
#ifdef CONFIG_DM_MMC
static int s5p_sdhci_probe(struct udevice *dev)
{
- struct s5p_sdhci_plat *plat = dev_get_platdata(dev);
+ struct s5p_sdhci_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct sdhci_host *host = dev_get_priv(dev);
int ret;
static int s5p_sdhci_bind(struct udevice *dev)
{
- struct s5p_sdhci_plat *plat = dev_get_platdata(dev);
+ struct s5p_sdhci_plat *plat = dev_get_plat(dev);
int ret;
ret = sdhci_bind(dev, &plat->mmc, &plat->cfg);
int sandbox_mmc_probe(struct udevice *dev)
{
- struct sandbox_mmc_plat *plat = dev_get_platdata(dev);
+ struct sandbox_mmc_plat *plat = dev_get_plat(dev);
return mmc_init(&plat->mmc);
}
int sandbox_mmc_bind(struct udevice *dev)
{
- struct sandbox_mmc_plat *plat = dev_get_platdata(dev);
+ struct sandbox_mmc_plat *plat = dev_get_plat(dev);
struct mmc_config *cfg = &plat->cfg;
cfg->name = dev->name;
static void sdhci_cdns_set_control_reg(struct sdhci_host *host)
{
struct mmc *mmc = host->mmc;
- struct sdhci_cdns_plat *plat = dev_get_platdata(mmc->dev);
+ struct sdhci_cdns_plat *plat = dev_get_plat(mmc->dev);
unsigned int clock = mmc->clock;
u32 mode, tmp;
static int __maybe_unused sdhci_cdns_execute_tuning(struct udevice *dev,
unsigned int opcode)
{
- struct sdhci_cdns_plat *plat = dev_get_platdata(dev);
+ struct sdhci_cdns_plat *plat = dev_get_plat(dev);
struct mmc *mmc = &plat->mmc;
int cur_streak = 0;
int max_streak = 0;
static int sdhci_cdns_bind(struct udevice *dev)
{
- struct sdhci_cdns_plat *plat = dev_get_platdata(dev);
+ struct sdhci_cdns_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
{
DECLARE_GLOBAL_DATA_PTR;
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct sdhci_cdns_plat *plat = dev_get_platdata(dev);
+ struct sdhci_cdns_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
fdt_addr_t base;
int ret;
static int sh_mmcif_dm_bind(struct udevice *dev)
{
- struct sh_mmcif_plat *plat = dev_get_platdata(dev);
+ struct sh_mmcif_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int sh_mmcif_dm_probe(struct udevice *dev)
{
- struct sh_mmcif_plat *plat = dev_get_platdata(dev);
+ struct sh_mmcif_plat *plat = dev_get_plat(dev);
struct sh_mmcif_host *host = dev_get_priv(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct clk sh_mmcif_clk;
static int sh_sdhi_dm_bind(struct udevice *dev)
{
- struct sh_sdhi_plat *plat = dev_get_platdata(dev);
+ struct sh_sdhi_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int sh_sdhi_dm_probe(struct udevice *dev)
{
- struct sh_sdhi_plat *plat = dev_get_platdata(dev);
+ struct sh_sdhi_plat *plat = dev_get_plat(dev);
struct sh_sdhi_host *host = dev_get_priv(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct clk sh_sdhi_clk;
static int snps_dwmmc_probe(struct udevice *dev)
{
#ifdef CONFIG_BLK
- struct snps_dwmci_plat *plat = dev_get_platdata(dev);
+ struct snps_dwmci_plat *plat = dev_get_plat(dev);
#endif
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
static int snps_dwmmc_bind(struct udevice *dev)
{
#ifdef CONFIG_BLK
- struct snps_dwmci_plat *plat = dev_get_platdata(dev);
+ struct snps_dwmci_plat *plat = dev_get_plat(dev);
int ret;
ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
static int socfpga_dwmmc_probe(struct udevice *dev)
{
#ifdef CONFIG_BLK
- struct socfpga_dwmci_plat *plat = dev_get_platdata(dev);
+ struct socfpga_dwmci_plat *plat = dev_get_plat(dev);
#endif
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev);
static int socfpga_dwmmc_bind(struct udevice *dev)
{
#ifdef CONFIG_BLK
- struct socfpga_dwmci_plat *plat = dev_get_platdata(dev);
+ struct socfpga_dwmci_plat *plat = dev_get_plat(dev);
int ret;
ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
*/
static int sti_mmc_core_config(struct udevice *dev)
{
- struct sti_sdhci_plat *plat = dev_get_platdata(dev);
+ struct sti_sdhci_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
int ret;
static int sti_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct sti_sdhci_plat *plat = dev_get_platdata(dev);
+ struct sti_sdhci_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
int ret;
static int sti_sdhci_bind(struct udevice *dev)
{
- struct sti_sdhci_plat *plat = dev_get_platdata(dev);
+ struct sti_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int stm32_sdmmc2_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct stm32_sdmmc2_plat *plat = dev_get_platdata(dev);
+ struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
int ret;
static int stm32_sdmmc_bind(struct udevice *dev)
{
- struct stm32_sdmmc2_plat *plat = dev_get_platdata(dev);
+ struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int sunxi_mmc_set_ios(struct udevice *dev)
{
- struct sunxi_mmc_plat *plat = dev_get_platdata(dev);
+ struct sunxi_mmc_plat *plat = dev_get_plat(dev);
struct sunxi_mmc_priv *priv = dev_get_priv(dev);
return sunxi_mmc_set_ios_common(priv, &plat->mmc);
static int sunxi_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
- struct sunxi_mmc_plat *plat = dev_get_platdata(dev);
+ struct sunxi_mmc_plat *plat = dev_get_plat(dev);
struct sunxi_mmc_priv *priv = dev_get_priv(dev);
return sunxi_mmc_send_cmd_common(priv, &plat->mmc, cmd, data);
static int sunxi_mmc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct sunxi_mmc_plat *plat = dev_get_platdata(dev);
+ struct sunxi_mmc_plat *plat = dev_get_plat(dev);
struct sunxi_mmc_priv *priv = dev_get_priv(dev);
struct reset_ctl_bulk reset_bulk;
struct clk gate_clk;
static int sunxi_mmc_bind(struct udevice *dev)
{
- struct sunxi_mmc_plat *plat = dev_get_platdata(dev);
+ struct sunxi_mmc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static int sdhci_tangier_bind(struct udevice *dev)
{
- struct sdhci_tangier_plat *plat = dev_get_platdata(dev);
+ struct sdhci_tangier_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int sdhci_tangier_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct sdhci_tangier_plat *plat = dev_get_platdata(dev);
+ struct sdhci_tangier_plat *plat = dev_get_plat(dev);
struct sdhci_host *host = dev_get_priv(dev);
fdt_addr_t base;
int ret;
static int tegra_mmc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct tegra_mmc_plat *plat = dev_get_platdata(dev);
+ struct tegra_mmc_plat *plat = dev_get_plat(dev);
struct tegra_mmc_priv *priv = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
int bus_width, ret;
static int tegra_mmc_bind(struct udevice *dev)
{
- struct tegra_mmc_plat *plat = dev_get_platdata(dev);
+ struct tegra_mmc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
int tmio_sd_bind(struct udevice *dev)
{
- struct tmio_sd_plat *plat = dev_get_platdata(dev);
+ struct tmio_sd_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
int tmio_sd_probe(struct udevice *dev, u32 quirks)
{
- struct tmio_sd_plat *plat = dev_get_platdata(dev);
+ struct tmio_sd_plat *plat = dev_get_plat(dev);
struct tmio_sd_priv *priv = dev_get_priv(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
fdt_addr_t base;
static int xenon_sdhci_probe(struct udevice *dev)
{
- struct xenon_sdhci_plat *plat = dev_get_platdata(dev);
+ struct xenon_sdhci_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct xenon_sdhci_priv *priv = dev_get_priv(dev);
struct sdhci_host *host = dev_get_priv(dev);
static int xenon_sdhci_bind(struct udevice *dev)
{
- struct xenon_sdhci_plat *plat = dev_get_platdata(dev);
+ struct xenon_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static int arasan_sdhci_probe(struct udevice *dev)
{
- struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
+ struct arasan_sdhci_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct arasan_sdhci_priv *priv = dev_get_priv(dev);
struct sdhci_host *host;
static int arasan_sdhci_bind(struct udevice *dev)
{
- struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
+ struct arasan_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
{
struct mtd_info *mtd = info->mtd;
struct udevice *dev = mtd->dev;
- struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
+ struct altera_qspi_platdata *pdata = dev_get_plat(dev);
ulong base = (ulong)pdata->base;
loff_t to = addr - base;
size_t retlen;
static int altera_qspi_erase(struct mtd_info *mtd, struct erase_info *instr)
{
struct udevice *dev = mtd->dev;
- struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
+ struct altera_qspi_platdata *pdata = dev_get_plat(dev);
struct altera_qspi_regs *regs = pdata->regs;
size_t addr = instr->addr;
size_t len = instr->len;
size_t *retlen, u_char *buf)
{
struct udevice *dev = mtd->dev;
- struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
+ struct altera_qspi_platdata *pdata = dev_get_plat(dev);
memcpy_fromio(buf, pdata->base + from, len);
*retlen = len;
size_t *retlen, const u_char *buf)
{
struct udevice *dev = mtd->dev;
- struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
+ struct altera_qspi_platdata *pdata = dev_get_plat(dev);
struct altera_qspi_regs *regs = pdata->regs;
u32 stat;
uint64_t *len)
{
struct udevice *dev = mtd->dev;
- struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
+ struct altera_qspi_platdata *pdata = dev_get_plat(dev);
struct altera_qspi_regs *regs = pdata->regs;
int shift0 = ffs(QUADSPI_SR_BP2_0) - 1;
int shift3 = ffs(QUADSPI_SR_BP3) - 1 - 3;
static int altera_qspi_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
{
struct udevice *dev = mtd->dev;
- struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
+ struct altera_qspi_platdata *pdata = dev_get_plat(dev);
struct altera_qspi_regs *regs = pdata->regs;
u32 sector_start, sector_end;
u32 num_sectors;
static int altera_qspi_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
{
struct udevice *dev = mtd->dev;
- struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
+ struct altera_qspi_platdata *pdata = dev_get_plat(dev);
struct altera_qspi_regs *regs = pdata->regs;
u32 mem_op;
static int altera_qspi_probe(struct udevice *dev)
{
- struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
+ struct altera_qspi_platdata *pdata = dev_get_plat(dev);
struct altera_qspi_regs *regs = pdata->regs;
unsigned long base = (unsigned long)pdata->base;
struct mtd_info *mtd;
static int altera_qspi_ofdata_to_platdata(struct udevice *dev)
{
- struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
+ struct altera_qspi_platdata *pdata = dev_get_plat(dev);
void *blob = (void *)gd->fdt_blob;
int node = dev_of_offset(dev);
const char *list, *end;
struct sandbox_spi_flash *sbsf = dev_get_priv(dev);
size_t len, idname_len;
const struct flash_info *data;
- struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev);
+ struct sandbox_spi_flash_plat_data *pdata = dev_get_plat(dev);
struct sandbox_state *state = state_get_current();
struct dm_spi_slave_platdata *slave_plat;
struct udevice *bus = dev->parent;
int sandbox_sf_ofdata_to_platdata(struct udevice *dev)
{
- struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev);
+ struct sandbox_spi_flash_plat_data *pdata = dev_get_plat(dev);
pdata->filename = dev_read_string(dev, "sandbox,filename");
pdata->device_name = dev_read_string(dev, "compatible");
*/
static int ag7xxx_eth_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ar7xxx_eth_priv *priv = dev_get_priv(dev);
unsigned char *mac = pdata->enetaddr;
u32 macid_lo, macid_hi;
static int ag7xxx_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ar7xxx_eth_priv *priv = dev_get_priv(dev);
void __iomem *iobase, *phyiobase;
int ret, phyreg;
static int ag7xxx_eth_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
int ret;
{
struct altera_tse_priv *priv = dev_get_priv(dev);
struct alt_tse_mac *mac_dev = priv->mac_dev;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
u8 *hwaddr = pdata->enetaddr;
u32 mac_lo, mac_hi;
static int altera_tse_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct altera_tse_priv *priv = dev_get_priv(dev);
void *blob = (void *)gd->fdt_blob;
int node = dev_of_offset(dev);
static int altera_tse_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
pdata->phy_interface = -1;
static int bcm6348_eth_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct bcm6348_eth_priv *priv = dev_get_priv(dev);
bool running = false;
static int bcm6348_phy_init(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct bcm6348_eth_priv *priv = dev_get_priv(dev);
struct mii_dev *bus;
static int bcm6348_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct bcm6348_eth_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args phy;
const char *phy_mode;
static int bcm6368_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct bcm6368_eth_priv *priv = dev_get_priv(dev);
int num_ports, ret, i;
ofnode node;
static int bcmgenet_gmac_write_hwaddr(struct udevice *dev)
{
struct bcmgenet_eth_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
uchar *addr = pdata->enetaddr;
u32 reg;
static int bcmgenet_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct bcmgenet_eth_priv *priv = dev_get_priv(dev);
ofnode mdio_node;
const char *name;
static int bcmgenet_eth_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct bcmgenet_eth_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args phy_node;
const char *phy_mode;
#else /* DM_ETH */
static int dc2114x_start(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct dc2114x_priv *priv = dev_get_priv(dev);
memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
static int dc2114x_probe(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct dc2114x_priv *priv = dev_get_priv(dev);
u16 command, status;
u32 iobase;
{
struct udevice *dev = bus->priv;
struct dw_eth_dev *priv = dev_get_priv(dev);
- struct dw_eth_pdata *pdata = dev_get_platdata(dev);
+ struct dw_eth_pdata *pdata = dev_get_plat(dev);
int ret;
if (!dm_gpio_is_valid(&priv->reset_gpio))
#ifdef CONFIG_DM_ETH
static int designware_eth_start(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct dw_eth_dev *priv = dev_get_priv(dev);
int ret;
int designware_eth_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct dw_eth_dev *priv = dev_get_priv(dev);
return _dw_write_hwaddr(priv, pdata->enetaddr);
int designware_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct dw_eth_dev *priv = dev_get_priv(dev);
u32 iobase = pdata->iobase;
ulong ioaddr;
int designware_eth_ofdata_to_platdata(struct udevice *dev)
{
- struct dw_eth_pdata *dw_pdata = dev_get_platdata(dev);
+ struct dw_eth_pdata *dw_pdata = dev_get_plat(dev);
#if CONFIG_IS_ENABLED(DM_GPIO)
struct dw_eth_dev *priv = dev_get_priv(dev);
#endif
static int eqos_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct eqos_priv *eqos = dev_get_priv(dev);
uint32_t val;
static int eqos_read_rom_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
#ifdef CONFIG_ARCH_IMX8M
imx_get_mac_from_fuse(dev->req_seq, pdata->enetaddr);
static int dwmac_socfpga_ofdata_to_platdata(struct udevice *dev)
{
- struct dwmac_socfpga_platdata *pdata = dev_get_platdata(dev);
+ struct dwmac_socfpga_platdata *pdata = dev_get_plat(dev);
struct regmap *regmap;
struct ofnode_phandle_args args;
void *range;
static int dwmac_socfpga_probe(struct udevice *dev)
{
- struct dwmac_socfpga_platdata *pdata = dev_get_platdata(dev);
+ struct dwmac_socfpga_platdata *pdata = dev_get_plat(dev);
struct eth_pdata *edata = &pdata->dw_eth_pdata.eth_pdata;
struct reset_ctl_bulk reset_bulk;
int ret;
e1000_name(name, cardnum);
ret = uclass_get_device_by_name(UCLASS_ETH, name, &dev);
if (!ret) {
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
mac = plat->enetaddr;
}
#else
#ifdef CONFIG_DM_ETH
static int e1000_eth_start(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct e1000_hw *hw = dev_get_priv(dev);
return _e1000_init(hw, plat->enetaddr);
static int e1000_eth_probe(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct e1000_hw *hw = dev_get_priv(dev);
int ret;
#else /* DM_ETH */
static int eepro100_start(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct eepro100_priv *priv = dev_get_priv(dev);
memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
static int eepro100_probe(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct eepro100_priv *priv = dev_get_priv(dev);
u16 command, status;
u32 iobase;
static int ethoc_write_hwaddr(struct udevice *dev)
{
- struct ethoc_eth_pdata *pdata = dev_get_platdata(dev);
+ struct ethoc_eth_pdata *pdata = dev_get_plat(dev);
struct ethoc *priv = dev_get_priv(dev);
u8 *mac = pdata->eth_pdata.enetaddr;
static int ethoc_ofdata_to_platdata(struct udevice *dev)
{
- struct ethoc_eth_pdata *pdata = dev_get_platdata(dev);
+ struct ethoc_eth_pdata *pdata = dev_get_plat(dev);
fdt_addr_t addr;
pdata->eth_pdata.iobase = dev_read_addr(dev);
static int ethoc_probe(struct udevice *dev)
{
- struct ethoc_eth_pdata *pdata = dev_get_platdata(dev);
+ struct ethoc_eth_pdata *pdata = dev_get_plat(dev);
struct ethoc *priv = dev_get_priv(dev);
priv->iobase = ioremap(pdata->eth_pdata.iobase, ETHOC_IOSIZE);
{
#ifdef CONFIG_DM_ETH
struct fec_priv *fec = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
uchar *mac = pdata->enetaddr;
#else
uchar *mac = dev->enetaddr;
static int fecmxc_read_rom_hwaddr(struct udevice *dev)
{
struct fec_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
return fec_get_hwaddr(priv->dev_id, pdata->enetaddr);
}
static int fecmxc_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct fec_priv *priv = dev_get_priv(dev);
struct mii_dev *bus = NULL;
uint32_t start;
static int fecmxc_ofdata_to_platdata(struct udevice *dev)
{
int ret = 0;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct fec_priv *priv = dev_get_priv(dev);
const char *phy_mode;
#ifndef CONFIG_DM_ETH
struct fm_eth *fm_eth = dev->priv;
#else
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct fm_eth *fm_eth = dev_get_priv(dev);
#endif
unsigned char *enetaddr;
enum mc_fixup_type type)
{
#ifdef CONFIG_DM_ETH
- struct eth_pdata *plat = dev_get_platdata(eth_dev);
+ struct eth_pdata *plat = dev_get_plat(eth_dev);
unsigned char *enetaddr = plat->enetaddr;
int eth_index = eth_dev->seq;
#else
strcmp(dev->driver->name, ENETC_DRIVER_NAME))
continue;
- pdata = dev_get_platdata(dev);
+ pdata = dev_get_plat(dev);
ppdata = dev_get_parent_plat(dev);
devfn = PCI_FUNC(ppdata->devfn);
{
struct pci_child_platdata *ppdata = dev_get_parent_plat(dev);
const int devfn_to_pf[] = {0, 1, 2, -1, -1, -1, 3};
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
int devfn = PCI_FUNC(ppdata->devfn);
u8 *addr = plat->enetaddr;
u32 lower, upper;
static int enetc_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct enetc_priv *priv = dev_get_priv(dev);
u8 *addr = plat->enetaddr;
static int mcdmafec_probe(struct udevice *dev)
{
struct fec_info_dma *info = dev->priv;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int node = dev_of_offset(dev);
int retval;
const u32 *val;
*/
static int mcdmafec_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const u32 *val;
pdata->iobase = dev_read_addr(dev);
static int ftgmac100_start(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct ftgmac100_data *priv = dev_get_priv(dev);
struct ftgmac100 *ftgmac100 = priv->iobase;
struct phy_device *phydev = priv->phydev;
static int ftgmac100_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ftgmac100_data *priv = dev_get_priv(dev);
return ftgmac100_set_mac(priv, pdata->enetaddr);
static int ftgmac100_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ftgmac100_data *priv = dev_get_priv(dev);
const char *phy_mode;
static int ftgmac100_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ftgmac100_data *priv = dev_get_priv(dev);
int ret;
#ifdef CONFIG_DM_ETH
static int ftmac100_start(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct ftmac100_data *priv = dev_get_priv(dev);
return _ftmac100_init(priv, plat->enetaddr);
int ftmac100_read_rom_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
eth_env_get_enetaddr("ethaddr", pdata->enetaddr);
return 0;
}
static int ftmac100_ofdata_to_platdata(struct udevice *dev)
{
struct ftmac100_data *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const char *mac;
pdata->iobase = dev_read_addr(dev);
priv->iobase = pdata->iobase;
static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
{
- struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+ struct gmac_rockchip_platdata *pdata = dev_get_plat(dev);
const char *string;
string = dev_read_string(dev, "clock_in_out");
static int gmac_rockchip_probe(struct udevice *dev)
{
- struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+ struct gmac_rockchip_platdata *pdata = dev_get_plat(dev);
struct rk_gmac_ops *ops =
(struct rk_gmac_ops *)dev_get_driver_data(dev);
- struct dw_eth_pdata *dw_pdata = dev_get_platdata(dev);
+ struct dw_eth_pdata *dw_pdata = dev_get_plat(dev);
struct eth_pdata *eth_pdata = &dw_pdata->eth_pdata;
struct clk clk;
ulong rate;
static int gmac_rockchip_eth_start(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct dw_eth_dev *priv = dev_get_priv(dev);
struct rk_gmac_ops *ops =
(struct rk_gmac_ops *)dev_get_driver_data(dev);
static int higmac_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct higmac_priv *priv = dev_get_priv(dev);
unsigned char *mac = pdata->enetaddr;
u32 val;
static int ks8851_write_hwaddr(struct udevice *dev)
{
struct ks_net *ks = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
ks8851_mll_write_hwaddr_common(ks, pdata->enetaddr);
static int ks8851_read_rom_hwaddr(struct udevice *dev)
{
struct ks_net *ks = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
u16 addrl, addrm, addrh;
/* No EEPROM means no valid MAC address. */
static int ks8851_ofdata_to_platdata(struct udevice *dev)
{
struct ks_net *ks = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
pdata->iobase = dev_read_addr(dev);
ks->iobase = pdata->iobase;
#ifdef CONFIG_DM_ETH
static int ldpaa_eth_open(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct ldpaa_eth_priv *priv = dev_get_priv(dev);
#else
static int ldpaa_eth_open(struct eth_device *net_dev, struct bd_info *bd)
static int macb_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct macb_device *macb = dev_get_priv(dev);
return _macb_write_hwaddr(macb, plat->enetaddr);
static int macb_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct macb_device *macb = dev_get_priv(dev);
const char *phy_mode;
int ret;
static int macb_eth_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
pdata->iobase = (phys_addr_t)dev_remap_addr(dev);
if (!pdata->iobase)
*/
static int mcffec_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct fec_info_s *info = dev->priv;
int node = dev_of_offset(dev);
int retval, fec_idx;
*/
static int mcffec_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const u32 *val;
pdata->iobase = dev_read_addr(dev);
static int jr2_write_hwaddr(struct udevice *dev)
{
struct jr2_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
return jr2_mac_table_add(priv, pdata->enetaddr, PGID_UNICAST);
}
static int jr2_start(struct udevice *dev)
{
struct jr2_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const unsigned char mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff,
0xff };
int ret;
static int luton_write_hwaddr(struct udevice *dev)
{
struct luton_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
mscc_mac_table_add(priv->regs[ANA], luton_regs_ana_table,
pdata->enetaddr, PGID_UNICAST);
static int luton_start(struct udevice *dev)
{
struct luton_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const unsigned char mac[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff,
0xff };
int ret;
static int ocelot_write_hwaddr(struct udevice *dev)
{
struct ocelot_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
mscc_mac_table_add(priv->regs[ANA], ocelot_regs_ana_table,
pdata->enetaddr, PGID_UNICAST);
static int ocelot_start(struct udevice *dev)
{
struct ocelot_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const unsigned char mac[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff,
0xff };
int ret;
static int serval_write_hwaddr(struct udevice *dev)
{
struct serval_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
mscc_mac_table_add(priv->regs[ANA], serval_regs_ana_table,
pdata->enetaddr, PGID_UNICAST);
static int serval_start(struct udevice *dev)
{
struct serval_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const unsigned char mac[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff,
0xff };
int ret;
static int servalt_write_hwaddr(struct udevice *dev)
{
struct servalt_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
return servalt_mac_table_add(priv, pdata->enetaddr, PGID_UNICAST);
}
static int servalt_start(struct udevice *dev)
{
struct servalt_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const unsigned char mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff,
0xff };
int ret;
{
struct mt7628_eth_dev *priv = dev_get_priv(dev);
void __iomem *base = priv->base;
- u8 *addr = ((struct eth_pdata *)dev_get_platdata(dev))->enetaddr;
+ u8 *addr = ((struct eth_pdata *)dev_get_plat(dev))->enetaddr;
u32 val;
/* Set MAC address. */
static int mtk_eth_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct mtk_eth_priv *priv = dev_get_priv(dev);
unsigned char *mac = pdata->enetaddr;
u32 macaddr_lsb, macaddr_msb;
static int mtk_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct mtk_eth_priv *priv = dev_get_priv(dev);
ulong iobase = pdata->iobase;
int ret;
static int mtk_eth_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct mtk_eth_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args args;
struct regmap *regmap;
#ifdef CONFIG_DM_ETH
static int mvgbe_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
port_uc_addr_set(dev_get_priv(dev), pdata->enetaddr);
static int mvgbe_start(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct mvgbe_device *dmvgbe = dev_get_priv(dev);
int ret;
static int mvgbe_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct mvgbe_device *dmvgbe = dev_get_priv(dev);
struct mii_dev *bus;
int ret;
static int mvgbe_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct mvgbe_device *dmvgbe = dev_get_priv(dev);
void *blob = (void *)gd->fdt_blob;
int node = dev_of_offset(dev);
static int mvneta_write_hwaddr(struct udevice *dev)
{
mvneta_mac_addr_set(dev_get_priv(dev),
- ((struct eth_pdata *)dev_get_platdata(dev))->enetaddr,
+ ((struct eth_pdata *)dev_get_plat(dev))->enetaddr,
rxq_def);
return 0;
/* Device initialization routine */
static int mvneta_init(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct mvneta_port *pp = dev_get_priv(dev);
int err;
static int mvneta_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct mvneta_port *pp = dev_get_priv(dev);
void *blob = (void *)gd->fdt_blob;
int node = dev_of_offset(dev);
static int mvneta_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
pdata->iobase = dev_read_addr(dev);
static int mvpp2_start(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct mvpp2_port *port = dev_get_priv(dev);
/* Load current MAC address */
static void nicvf_handle_mbx_intr(struct nicvf *nic)
{
union nic_mbx mbx = {};
- struct eth_pdata *pdata = dev_get_platdata(nic->dev);
+ struct eth_pdata *pdata = dev_get_plat(nic->dev);
u64 *mbx_data;
u64 mbx_addr;
int i;
static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct udevice *dev)
{
union nic_mbx mbx = {};
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
mbx.mac.vf_id = nic->vf_id;
int nicvf_write_hwaddr(struct udevice *dev)
{
unsigned char ethaddr[ARP_HLEN];
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct nicvf *nic = dev_get_priv(dev);
/* If lower level firmware fails to set proper MAC
int nicvf_initialize(struct udevice *dev)
{
struct nicvf *nicvf = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int ret = 0, bgx, lmac;
char name[16];
unsigned char ethaddr[ARP_HLEN];
{
struct rvu_pf *rvu = dev_get_priv(dev);
struct nix *nix = rvu->nix;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
/* If lower level firmware fails to set proper MAC
* u-boot framework updates MAC to random address.
int rvu_pf_init(struct rvu_pf *rvu)
{
struct nix *nix;
- struct eth_pdata *pdata = dev_get_platdata(rvu->dev);
+ struct eth_pdata *pdata = dev_get_plat(rvu->dev);
debug("%s: Allocating nix lf\n", __func__);
nix = nix_lf_alloc(rvu->dev);
static int pch_gbe_reset(struct udevice *dev)
{
struct pch_gbe_priv *priv = dev_get_priv(dev);
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct pch_gbe_regs *mac_regs = priv->mac_regs;
ulong start;
static int pch_gbe_phy_init(struct udevice *dev)
{
struct pch_gbe_priv *priv = dev_get_priv(dev);
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct phy_device *phydev;
int mask = 0xffffffff;
static int pch_gbe_probe(struct udevice *dev)
{
struct pch_gbe_priv *priv;
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
void *iobase;
int err;
#else /* DM_ETH */
static int pcnet_start(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct pcnet_priv *priv = dev_get_priv(dev);
memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
static int pcnet_probe(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct pcnet_priv *lp = dev_get_priv(dev);
u16 command, status;
u32 iobase;
{
struct pfe_eth_dev *priv = dev_get_priv(dev);
struct gemac_s *gem = priv->gem;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
uchar *mac = pdata->enetaddr;
writel((mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3],
{
struct pfe_eth_dev *priv = dev_get_priv(dev);
struct pfe_ddr_address pfe_addr;
- struct pfe_eth_pdata *pdata = dev_get_platdata(dev);
+ struct pfe_eth_pdata *pdata = dev_get_plat(dev);
int ret = 0;
static int init_done;
static int pfe_eth_bind(struct udevice *dev)
{
- struct pfe_eth_pdata *pdata = dev_get_platdata(dev);
+ struct pfe_eth_pdata *pdata = dev_get_plat(dev);
char name[20];
sprintf(name, "pfe_eth%u", pdata->pfe_eth_pdata_mac.phy_interface);
static int pic32_eth_start(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct pic32eth_dev *priv = dev_get_priv(dev);
/* controller */
static int pic32_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct pic32eth_dev *priv = dev_get_priv(dev);
const char *phy_mode;
void __iomem *iobase;
static int qe_uec_set_hwaddr(struct udevice *dev)
{
struct qe_uec_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct uec_priv *uec = priv->uec;
uec_t *uec_regs = uec->uec_regs;
uchar *mac = pdata->enetaddr;
static int qe_uec_set_uec_info(struct udevice *dev)
{
struct qe_uec_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct uec_priv *uec = priv->uec;
struct uec_inf *uec_info;
struct ucc_fast_inf *uf_info;
static int qe_uec_probe(struct udevice *dev)
{
struct qe_uec_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct uec_priv *uec;
int ret;
static int qe_uec_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
pdata->iobase = (phys_addr_t)devfdt_get_addr(dev);
static int ravb_phy_config(struct udevice *dev)
{
struct ravb_priv *eth = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct phy_device *phydev;
int mask = 0xffffffff, reg;
static int ravb_write_hwaddr(struct udevice *dev)
{
struct ravb_priv *eth = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
unsigned char *mac = pdata->enetaddr;
writel((mac[0] << 24) | (mac[1] << 16) | (mac[2] << 8) | mac[3],
static int ravb_dmac_init(struct udevice *dev)
{
struct ravb_priv *eth = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int ret = 0;
/* Set CONFIG mode */
static int ravb_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ravb_priv *eth = dev_get_priv(dev);
struct ofnode_phandle_args phandle_args;
struct mii_dev *mdiodev;
int ravb_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
const fdt32_t *cell;
int ret = 0;
#else /* DM_ETH */
static int rtl8139_start(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct rtl8139_priv *priv = dev_get_priv(dev);
memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
static int rtl8139_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct rtl8139_priv *priv = dev_get_priv(dev);
memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
static int rtl8139_probe(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct rtl8139_priv *priv = dev_get_priv(dev);
u32 iobase;
#ifdef CONFIG_DM_ETH
static int rtl8169_eth_start(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct rtl8169_private *priv = dev_get_priv(dev);
rtl8169_common_start(dev, plat->enetaddr, priv->iobase);
#ifdef CONFIG_DM_ETH
static int rtl8169_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
unsigned int i;
RTL_W8(Cfg9346, Cfg9346_Unlock);
{
struct pci_child_platdata *pplat = dev_get_parent_plat(dev);
struct rtl8169_private *priv = dev_get_priv(dev);
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
u32 iobase;
int region;
int ret;
static int sb_eth_raw_start(struct udevice *dev)
{
struct eth_sandbox_raw_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int ret;
debug("eth_sandbox_raw: Start\n");
static int sb_eth_raw_recv(struct udevice *dev, int flags, uchar **packetp)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct eth_sandbox_raw_priv *priv = dev_get_priv(dev);
int retval = 0;
int length;
static int sb_eth_raw_read_rom_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
net_random_ethaddr(pdata->enetaddr);
static int sb_eth_raw_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct eth_sandbox_raw_priv *priv = dev_get_priv(dev);
const char *ifname;
int ret;
static int sb_eth_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
debug("eth_sandbox %s: Write HW ADDR - %pM\n", dev->name,
pdata->enetaddr);
static int sb_eth_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct eth_sandbox_priv *priv = dev_get_priv(dev);
const u8 *mac;
struct sh_ether_priv *priv = dev_get_priv(dev);
struct sh_eth_dev *eth = &priv->shdev;
struct sh_eth_info *port_info = ð->port_info[eth->port];
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
sh_eth_write_hwaddr(port_info, pdata->enetaddr);
static int sh_eth_phy_config(struct udevice *dev)
{
struct sh_ether_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct sh_eth_dev *eth = &priv->shdev;
int ret = 0;
struct sh_eth_info *port_info = ð->port_info[eth->port];
static int sh_ether_start(struct udevice *dev)
{
struct sh_ether_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct sh_eth_dev *eth = &priv->shdev;
int ret;
static int sh_ether_probe(struct udevice *udev)
{
- struct eth_pdata *pdata = dev_get_platdata(udev);
+ struct eth_pdata *pdata = dev_get_plat(udev);
struct sh_ether_priv *priv = dev_get_priv(udev);
struct sh_eth_dev *eth = &priv->shdev;
struct ofnode_phandle_args phandle_args;
int sh_ether_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
const fdt32_t *cell;
int ret = 0;
static int smc911x_start(struct udevice *dev)
{
- struct eth_pdata *plat = dev_get_platdata(dev);
+ struct eth_pdata *plat = dev_get_plat(dev);
struct smc911x_priv *priv = dev_get_priv(dev);
memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
static int smc911x_read_rom_hwaddr(struct udevice *dev)
{
struct smc911x_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
if (!smc911x_read_mac_address(priv))
return -ENODEV;
static int smc911x_ofdata_to_platdata(struct udevice *dev)
{
struct smc911x_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
pdata->iobase = dev_read_addr(dev);
priv->iobase = pdata->iobase;
static int ave_adjust_link(struct ave_private *priv)
{
struct phy_device *phydev = priv->phydev;
- struct eth_pdata *pdata = dev_get_platdata(phydev->dev);
+ struct eth_pdata *pdata = dev_get_plat(phydev->dev);
u32 val, txcr, rxcr, rxcr_org;
u16 rmt_adv = 0, lcl_adv = 0;
u8 cap;
static int ave_write_hwaddr(struct udevice *dev)
{
struct ave_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
u8 *mac = pdata->enetaddr;
writel(mac[0] | mac[1] << 8 | mac[2] << 16 | mac[3] << 24,
static int ave_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ave_private *priv = dev_get_priv(dev);
struct ofnode_phandle_args args;
const char *phy_mode;
static int ave_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ave_private *priv = dev_get_priv(dev);
int ret, nc, nr;
static int sun8i_eth_write_hwaddr(struct udevice *dev)
{
struct emac_eth_dev *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
uchar *mac_id = pdata->enetaddr;
u32 macid_lo, macid_hi;
{
struct udevice *dev = bus->priv;
struct emac_eth_dev *priv = dev_get_priv(dev);
- struct sun8i_eth_pdata *pdata = dev_get_platdata(dev);
+ struct sun8i_eth_pdata *pdata = dev_get_plat(dev);
int ret;
if (!dm_gpio_is_valid(&priv->reset_gpio))
static int sun8i_emac_eth_probe(struct udevice *dev)
{
- struct sun8i_eth_pdata *sun8i_pdata = dev_get_platdata(dev);
+ struct sun8i_eth_pdata *sun8i_pdata = dev_get_plat(dev);
struct eth_pdata *pdata = &sun8i_pdata->eth_pdata;
struct emac_eth_dev *priv = dev_get_priv(dev);
int ret;
static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
{
- struct sun8i_eth_pdata *sun8i_pdata = dev_get_platdata(dev);
+ struct sun8i_eth_pdata *sun8i_pdata = dev_get_plat(dev);
struct eth_pdata *pdata = &sun8i_pdata->eth_pdata;
struct emac_eth_dev *priv = dev_get_priv(dev);
const char *phy_mode;
static int sunxi_emac_eth_start(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
return _sunxi_emac_eth_init(dev->priv, pdata->enetaddr);
}
static int sunxi_emac_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct emac_eth_dev *priv = dev_get_priv(dev);
int ret;
static int sunxi_emac_eth_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
pdata->iobase = dev_read_addr(dev);
static int am65_cpsw_start(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct am65_cpsw_common *common = priv->cpsw_common;
struct am65_cpsw_port *port = &common->ports[priv->port_id];
{
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct am65_cpsw_common *common = priv->cpsw_common;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
u32 mac_hi, mac_lo;
if (common->mac_efuse == FDT_ADDR_T_NONE)
{
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct am65_cpsw_common *cpsw_common = priv->cpsw_common;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct phy_device *phydev;
u32 supported = PHY_GBIT_FEATURES;
int ret;
static int am65_cpsw_ofdata_parse_phy(struct udevice *dev, ofnode port_np)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args out_args;
const char *phy_mode;
static int am65_cpsw_probe_cpsw(struct udevice *dev)
{
struct am65_cpsw_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct am65_cpsw_common *cpsw_common;
ofnode ports_np, node;
int ret, i;
struct cpsw_priv *priv)
{
#ifdef CONFIG_DM_ETH
- struct eth_pdata *pdata = dev_get_platdata(priv->dev);
+ struct eth_pdata *pdata = dev_get_plat(priv->dev);
writel(mac_hi(pdata->enetaddr), &slave->regs->sa_hi);
writel(mac_lo(pdata->enetaddr), &slave->regs->sa_lo);
#else
static int cpsw_eth_start(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct cpsw_priv *priv = dev_get_priv(dev);
return _cpsw_init(priv, pdata->enetaddr);
static int cpsw_eth_probe(struct udevice *dev)
{
struct cpsw_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
priv->dev = dev;
priv->data = pdata->priv_pdata;
static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct cpsw_platform_data *data;
struct gpio_desc *mode_gpios;
int slave_index = 0;
static int davinci_emac_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
unsigned long mac_hi;
unsigned long mac_lo;
int ks2_eth_read_rom_hwaddr(struct udevice *dev)
{
struct ks2_eth_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
u32 maca = 0;
u32 macb = 0;
int ks2_eth_write_hwaddr(struct udevice *dev)
{
struct ks2_eth_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
writel(mac_hi(pdata->enetaddr),
DEVICE_EMACSW_BASE(pdata->iobase, priv->slave_port - 1) +
static int ks2_sl_eth_ofdata_to_platdata(struct udevice *dev)
{
struct ks2_eth_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
int slave = dev_of_offset(dev);
int interfaces;
static int ks2_eth_ofdata_to_platdata(struct udevice *dev)
{
struct ks2_eth_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
int gbe_0 = -ENODEV;
int netcp_devices;
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
#ifdef CONFIG_DM_ETH
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
#else
struct eth_device *pdata = dev;
#endif
#else /* CONFIG_DM_ETH */
int tsec_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct tsec_private *priv = dev_get_priv(dev);
struct ofnode_phandle_args phandle_args;
u32 tbiaddr = CONFIG_SYS_TBIPA_VALUE;
static int axiemac_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct axidma_priv *priv = dev_get_priv(dev);
struct axi_regs *regs = priv->iobase;
static int axi_emac_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct axidma_priv *priv = dev_get_priv(dev);
int node = dev_of_offset(dev);
int offset = 0;
static int emaclite_start(struct udevice *dev)
{
struct xemaclite *emaclite = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct emaclite_regs *regs = emaclite->regs;
debug("EmacLite Initialization Started\n");
static int emaclite_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct xemaclite *emaclite = dev_get_priv(dev);
int offset = 0;
static int zynq_gem_setup_mac(struct udevice *dev)
{
u32 i, macaddrlow, macaddrhigh;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct zynq_gem_priv *priv = dev_get_priv(dev);
struct zynq_gem_regs *regs = priv->iobase;
static int zynq_gem_read_rom_mac(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
if (!pdata)
return -ENOSYS;
static int zynq_gem_ofdata_to_platdata(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct zynq_gem_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args phandle_args;
const char *phy_mode;
static void rcar_rmw32(struct udevice *dev, int where, u32 mask, u32 data)
{
- struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev);
+ struct rcar_gen3_pcie_priv *priv = dev_get_plat(dev);
int shift = 8 * (where & 3);
clrsetbits_le32(priv->regs + (where & ~3),
static u32 rcar_read_conf(const struct udevice *dev, int where)
{
- struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev);
+ struct rcar_gen3_pcie_priv *priv = dev_get_plat(dev);
int shift = 8 * (where & 3);
return readl(priv->regs + (where & ~3)) >> shift;
unsigned char access_type,
pci_dev_t bdf, int where, ulong *data)
{
- struct rcar_gen3_pcie_priv *priv = dev_get_platdata(udev);
+ struct rcar_gen3_pcie_priv *priv = dev_get_plat(udev);
u32 reg = where & ~3;
/* Clear errors */
static int rcar_gen3_pcie_wait_for_phyrdy(struct udevice *dev)
{
- struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev);
+ struct rcar_gen3_pcie_priv *priv = dev_get_plat(dev);
return wait_for_bit_le32((void *)priv->regs + PCIEPHYSR, PHYRDY,
true, 50, false);
static int rcar_gen3_pcie_wait_for_dl(struct udevice *dev)
{
- struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev);
+ struct rcar_gen3_pcie_priv *priv = dev_get_plat(dev);
return wait_for_bit_le32((void *)priv->regs + PCIETSTR,
DATA_LINK_ACTIVE, true, 50, false);
static int rcar_gen3_pcie_hw_init(struct udevice *dev)
{
- struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev);
+ struct rcar_gen3_pcie_priv *priv = dev_get_plat(dev);
int ret;
/* Begin initialization */
static int rcar_gen3_pcie_probe(struct udevice *dev)
{
- struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev);
+ struct rcar_gen3_pcie_priv *priv = dev_get_plat(dev);
struct pci_controller *hose = dev_get_uclass_priv(dev);
struct clk pci_clk;
u32 mask;
static int rcar_gen3_pcie_ofdata_to_platdata(struct udevice *dev)
{
- struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev);
+ struct rcar_gen3_pcie_priv *priv = dev_get_plat(dev);
priv->regs = devfdt_get_addr_index(dev, 0);
if (!priv->regs)
uint offset, ulong *valuep,
enum pci_size_t size)
{
- struct mvebu_pcie *pcie = dev_get_platdata(bus);
+ struct mvebu_pcie *pcie = dev_get_plat(bus);
int local_bus = PCI_BUS(pcie->dev);
int local_dev = PCI_DEV(pcie->dev);
u32 reg;
uint offset, ulong value,
enum pci_size_t size)
{
- struct mvebu_pcie *pcie = dev_get_platdata(bus);
+ struct mvebu_pcie *pcie = dev_get_plat(bus);
int local_bus = PCI_BUS(pcie->dev);
int local_dev = PCI_DEV(pcie->dev);
u32 data;
static int mvebu_pcie_probe(struct udevice *dev)
{
- struct mvebu_pcie *pcie = dev_get_platdata(dev);
+ struct mvebu_pcie *pcie = dev_get_plat(dev);
struct udevice *ctlr = pci_get_controller(dev);
struct pci_controller *hose = dev_get_uclass_priv(ctlr);
static int bus;
static int mvebu_pcie_ofdata_to_platdata(struct udevice *dev)
{
- struct mvebu_pcie *pcie = dev_get_platdata(dev);
+ struct mvebu_pcie *pcie = dev_get_plat(dev);
int ret = 0;
/* Get port number, lane number and memory target / attr */
static int sun4i_usb_phy_probe(struct udevice *dev)
{
- struct sun4i_usb_phy_plat *plat = dev_get_platdata(dev);
+ struct sun4i_usb_phy_plat *plat = dev_get_plat(dev);
struct sun4i_usb_phy_data *data = dev_get_priv(dev);
int i, ret;
int i;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct apl_gpio_platdata *plat = dev_get_platdata(dev);
+ struct apl_gpio_platdata *plat = dev_get_plat(dev);
int ret;
/*
static inline struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice *dev,
u32 bank)
{
- struct atmel_pio4_platdata *plat = dev_get_platdata(dev);
+ struct atmel_pio4_platdata *plat = dev_get_plat(dev);
struct atmel_pio4_port *bank_base =
(struct atmel_pio4_port *)((u32)plat->reg_base +
ATMEL_PIO_BANK_OFFSET * bank);
static int atmel_pinctrl_probe(struct udevice *dev)
{
- struct atmel_pio4_platdata *plat = dev_get_platdata(dev);
+ struct atmel_pio4_platdata *plat = dev_get_plat(dev);
fdt_addr_t addr_base;
dev = dev_get_parent(dev);
*/
void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
{
- struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+ struct sti_pinctrl_platdata *plat = dev_get_plat(dev);
unsigned long sysconf, *sysconfreg;
int alt = pin_desc->alt;
int bank = pin_desc->bank;
/* pin configuration */
void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
{
- struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+ struct sti_pinctrl_platdata *plat = dev_get_plat(dev);
int bit;
int oe = 0, pu = 0, od = 0;
unsigned long *sysconfreg;
static int sti_pinctrl_probe(struct udevice *dev)
{
- struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+ struct sti_pinctrl_platdata *plat = dev_get_plat(dev);
struct udevice *syscon;
int err;
unsigned int param, unsigned int arg)
{
int ret, dir;
- struct stmfx_pinctrl *plat = dev_get_platdata(dev);
+ struct stmfx_pinctrl *plat = dev_get_plat(dev);
dir = stmfx_gpio_get_function(plat->gpio, pin);
static int stmfx_pinctrl_get_pins_count(struct udevice *dev)
{
- struct stmfx_pinctrl *plat = dev_get_platdata(dev);
+ struct stmfx_pinctrl *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv;
uc_priv = dev_get_uclass_priv(plat->gpio);
unsigned int selector,
char *buf, int size)
{
- struct stmfx_pinctrl *plat = dev_get_platdata(dev);
+ struct stmfx_pinctrl *plat = dev_get_plat(dev);
int func;
func = stmfx_gpio_get_function(plat->gpio, selector);
static int stmfx_pinctrl_bind(struct udevice *dev)
{
- struct stmfx_pinctrl *plat = dev_get_platdata(dev);
+ struct stmfx_pinctrl *plat = dev_get_plat(dev);
/* subnode name is not explicit: use father name */
device_set_name(dev, dev->parent->name);
static int stmfx_pinctrl_probe(struct udevice *dev)
{
- struct stmfx_pinctrl *plat = dev_get_platdata(dev);
+ struct stmfx_pinctrl *plat = dev_get_plat(dev);
return device_probe(plat->gpio);
};
static void r7s72100_pfc_set_function(struct udevice *dev, u16 bank, u16 line,
u16 func, u16 inbuf, u16 bidir)
{
- struct r7s72100_pfc_platdata *plat = dev_get_platdata(dev);
+ struct r7s72100_pfc_platdata *plat = dev_get_plat(dev);
clrsetbits_le16(plat->base + PFCAE(bank), BIT(line),
(func & BIT(2)) ? BIT(line) : 0);
static int r7s72100_pfc_probe(struct udevice *dev)
{
- struct r7s72100_pfc_platdata *plat = dev_get_platdata(dev);
+ struct r7s72100_pfc_platdata *plat = dev_get_plat(dev);
fdt_addr_t addr_base;
ofnode node;
static int sandbox_pmc_emul_read_config(const struct udevice *emul, uint offset,
ulong *valuep, enum pci_size_t size)
{
- struct pmc_emul_platdata *plat = dev_get_platdata(emul);
+ struct pmc_emul_platdata *plat = dev_get_plat(emul);
switch (offset) {
case PCI_COMMAND:
static int sandbox_pmc_emul_write_config(struct udevice *emul, uint offset,
ulong value, enum pci_size_t size)
{
- struct pmc_emul_platdata *plat = dev_get_platdata(emul);
+ struct pmc_emul_platdata *plat = dev_get_plat(emul);
switch (offset) {
case PCI_COMMAND:
static int sandbox_pmc_emul_find_bar(struct udevice *emul, unsigned int addr,
int *barnump, unsigned int *offsetp)
{
- struct pmc_emul_platdata *plat = dev_get_platdata(emul);
+ struct pmc_emul_platdata *plat = dev_get_plat(emul);
int barnum;
for (barnum = 0; barnum < ARRAY_SIZE(barinfo); barnum++) {
return err;
}
- pdata = (struct imx8_power_domain_platdata *)dev_get_platdata(dev);
+ pdata = (struct imx8_power_domain_platdata *)dev_get_plat(dev);
ppriv = (struct imx8_power_domain_priv *)dev_get_priv(dev);
debug("%s(power_domain=%s) resource_id %d\n", __func__, dev->name,
sc_err_t ret;
ppriv = dev_get_priv(dev);
- pdata = dev_get_platdata(dev);
+ pdata = dev_get_plat(dev);
debug("%s, %s, state_on %d\n", __func__, dev->name, ppriv->state_on);
if (device_get_uclass_id(parent) == UCLASS_POWER_DOMAIN) {
pdata =
- (struct imx8_power_domain_platdata *)dev_get_platdata(parent);
+ (struct imx8_power_domain_platdata *)dev_get_plat(parent);
ppriv = (struct imx8_power_domain_priv *)dev_get_priv(parent);
debug("%s, %s, state_on %d\n", __func__, parent->name,
static int imx8_power_domain_ofdata_to_platdata(struct udevice *dev)
{
int reg;
- struct imx8_power_domain_platdata *pdata = dev_get_platdata(dev);
+ struct imx8_power_domain_platdata *pdata = dev_get_plat(dev);
reg = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "reg", -1);
if (reg == -1) {
struct udevice *dev = power_domain->dev;
struct imx8m_power_domain_platdata *pdata;
- pdata = dev_get_platdata(dev);
+ pdata = dev_get_plat(dev);
if (pdata->resource_id < 0)
return -EINVAL;
{
struct udevice *dev = power_domain->dev;
struct imx8m_power_domain_platdata *pdata;
- pdata = dev_get_platdata(dev);
+ pdata = dev_get_plat(dev);
if (pdata->resource_id < 0)
return -EINVAL;
static int imx8m_power_domain_ofdata_to_platdata(struct udevice *dev)
{
- struct imx8m_power_domain_platdata *pdata = dev_get_platdata(dev);
+ struct imx8m_power_domain_platdata *pdata = dev_get_plat(dev);
pdata->resource_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"reg", -1);
static int sandbox_i2c_pmic_read_data(struct udevice *emul, uchar chip,
uchar *buffer, int len)
{
- struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul);
+ struct sandbox_i2c_pmic_plat_data *plat = dev_get_plat(emul);
if (plat->rw_idx + len > plat->buf_size) {
pr_err("Request exceeds PMIC register range! Max register: %#x",
uchar *buffer, int len,
bool next_is_read)
{
- struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul);
+ struct sandbox_i2c_pmic_plat_data *plat = dev_get_plat(emul);
/* Probe only */
if (!len)
static int sandbox_i2c_pmic_ofdata_to_platdata(struct udevice *emul)
{
- struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul);
+ struct sandbox_i2c_pmic_plat_data *plat = dev_get_plat(emul);
struct udevice *pmic_dev = i2c_emul_get_device(emul);
debug("%s:%d Setting PMIC default registers\n", __func__, __LINE__);
static int sandbox_i2c_pmic_probe(struct udevice *emul)
{
- struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul);
+ struct sandbox_i2c_pmic_plat_data *plat = dev_get_plat(emul);
struct udevice *pmic_dev = i2c_emul_get_device(emul);
struct uc_pmic_priv *upriv = dev_get_uclass_priv(pmic_dev);
const u8 *reg_defaults;
static int bd71837_get_enable(struct udevice *dev)
{
int val;
- struct bd71837_platdata *plat = dev_get_platdata(dev);
+ struct bd71837_platdata *plat = dev_get_plat(dev);
/*
* boot critical regulators on bd71837 must not be controlled by sw
static int bd71837_set_enable(struct udevice *dev, bool enable)
{
int val = 0;
- struct bd71837_platdata *plat = dev_get_platdata(dev);
+ struct bd71837_platdata *plat = dev_get_plat(dev);
/*
* boot critical regulators on bd71837 must not be controlled by sw
unsigned int range;
int i;
int found = 0;
- struct bd71837_platdata *plat = dev_get_platdata(dev);
+ struct bd71837_platdata *plat = dev_get_plat(dev);
/*
* An under/overshooting may occur if voltage is changed for other
{
unsigned int reg, range;
unsigned int tmp;
- struct bd71837_platdata *plat = dev_get_platdata(dev);
+ struct bd71837_platdata *plat = dev_get_plat(dev);
int i;
reg = pmic_reg_read(dev->parent, plat->volt_reg);
static int bd71837_regulator_probe(struct udevice *dev)
{
- struct bd71837_platdata *plat = dev_get_platdata(dev);
+ struct bd71837_platdata *plat = dev_get_plat(dev);
int i, ret;
struct dm_regulator_uclass_plat *uc_pdata;
int type;
static int fan53555_regulator_ofdata_to_platdata(struct udevice *dev)
{
- struct fan53555_platdata *dev_pdata = dev_get_platdata(dev);
+ struct fan53555_platdata *dev_pdata = dev_get_plat(dev);
struct dm_regulator_uclass_plat *uc_pdata =
dev_get_uclass_plat(dev);
u32 sleep_vsel;
static int fan53555_regulator_get_value(struct udevice *dev)
{
- struct fan53555_platdata *pdata = dev_get_platdata(dev);
+ struct fan53555_platdata *pdata = dev_get_plat(dev);
struct fan53555_priv *priv = dev_get_priv(dev);
int reg;
int voltage;
static int fan53555_regulator_set_value(struct udevice *dev, int uV)
{
- struct fan53555_platdata *pdata = dev_get_platdata(dev);
+ struct fan53555_platdata *pdata = dev_get_plat(dev);
struct fan53555_priv *priv = dev_get_priv(dev);
u8 vol;
struct dm_regulator_uclass_plat *uc_pdata;
struct regulator_common_platdata *dev_pdata;
- dev_pdata = dev_get_platdata(dev);
+ dev_pdata = dev_get_plat(dev);
uc_pdata = dev_get_uclass_plat(dev);
if (!uc_pdata)
return -ENXIO;
static int fixed_regulator_get_enable(struct udevice *dev)
{
- return regulator_common_get_enable(dev, dev_get_platdata(dev));
+ return regulator_common_get_enable(dev, dev_get_plat(dev));
}
static int fixed_regulator_set_enable(struct udevice *dev, bool enable)
{
- return regulator_common_set_enable(dev, dev_get_platdata(dev), enable);
+ return regulator_common_set_enable(dev, dev_get_plat(dev), enable);
}
static const struct dm_regulator_ops fixed_regulator_ops = {
int ret, count, i, j;
u32 states_array[GPIO_REGULATOR_MAX_STATES * 2];
- dev_pdata = dev_get_platdata(dev);
+ dev_pdata = dev_get_plat(dev);
uc_pdata = dev_get_uclass_plat(dev);
if (!uc_pdata)
return -ENXIO;
static int gpio_regulator_get_value(struct udevice *dev)
{
struct dm_regulator_uclass_plat *uc_pdata;
- struct gpio_regulator_platdata *dev_pdata = dev_get_platdata(dev);
+ struct gpio_regulator_platdata *dev_pdata = dev_get_plat(dev);
int enable;
if (!dev_pdata->gpio.dev)
static int gpio_regulator_set_value(struct udevice *dev, int uV)
{
- struct gpio_regulator_platdata *dev_pdata = dev_get_platdata(dev);
+ struct gpio_regulator_platdata *dev_pdata = dev_get_plat(dev);
int ret;
bool enable;
static int gpio_regulator_get_enable(struct udevice *dev)
{
- struct gpio_regulator_platdata *dev_pdata = dev_get_platdata(dev);
+ struct gpio_regulator_platdata *dev_pdata = dev_get_plat(dev);
return regulator_common_get_enable(dev, &dev_pdata->common);
}
static int gpio_regulator_set_enable(struct udevice *dev, bool enable)
{
- struct gpio_regulator_platdata *dev_pdata = dev_get_platdata(dev);
+ struct gpio_regulator_platdata *dev_pdata = dev_get_plat(dev);
return regulator_common_set_enable(dev, &dev_pdata->common, enable);
}
static int pfuze100_regulator_probe(struct udevice *dev)
{
struct dm_regulator_uclass_plat *uc_pdata;
- struct pfuze100_regulator_platdata *plat = dev_get_platdata(dev);
+ struct pfuze100_regulator_platdata *plat = dev_get_plat(dev);
struct pfuze100_regulator_desc *desc;
switch (dev_get_driver_data(dev_get_parent(dev))) {
static int pfuze100_regulator_mode(struct udevice *dev, int op, int *opmode)
{
int val;
- struct pfuze100_regulator_platdata *plat = dev_get_platdata(dev);
+ struct pfuze100_regulator_platdata *plat = dev_get_plat(dev);
struct pfuze100_regulator_desc *desc = plat->desc;
if (op == PMIC_OP_GET) {
{
int i;
int val;
- struct pfuze100_regulator_platdata *plat = dev_get_platdata(dev);
+ struct pfuze100_regulator_platdata *plat = dev_get_plat(dev);
struct pfuze100_regulator_desc *desc = plat->desc;
struct dm_regulator_uclass_plat *uc_pdata =
dev_get_uclass_plat(dev);
static int tps62360_regulator_set_value(struct udevice *dev, int uV)
{
- struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps62360_regulator_pdata *pdata = dev_get_plat(dev);
u8 regval;
if (uV < pdata->config->vmin || uV > pdata->config->vmax)
{
u8 regval;
int ret;
- struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps62360_regulator_pdata *pdata = dev_get_plat(dev);
ret = dm_i2c_read(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset,
®val, 1);
static int tps62360_regulator_probe(struct udevice *dev)
{
- struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps62360_regulator_pdata *pdata = dev_get_plat(dev);
u8 vsel0;
u8 vsel1;
int ret;
const struct regulator_props *rgp)
{
int sel, val, vout;
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
int vin = pdata->supply;
val = pmic_reg_read(dev->parent, rgp->reg);
static int tps65910_ldo_get_value(struct udevice *dev)
{
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
int vin;
if (!pdata)
{
int val;
int sel = 0;
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
do {
/* we only allow exact voltage matches */
static int tps65910_ldo_set_value(struct udevice *dev, int uV)
{
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
int vin = pdata->supply;
switch (pdata->unit) {
static int tps65910_get_enable(struct udevice *dev)
{
int reg, val;
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
reg = get_ctrl_reg_from_unit_addr(pdata->unit);
if (reg < 0)
{
int reg;
uint clr, set;
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
reg = get_ctrl_reg_from_unit_addr(pdata->unit);
if (reg < 0)
static int tps65910_buck_get_value(struct udevice *dev)
{
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
switch (pdata->unit) {
case TPS65910_UNIT_VIO:
int ret, reg_vdd, gain;
int val;
struct dm_regulator_uclass_plat *uc_pdata;
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
switch (pdata->unit) {
case TPS65910_UNIT_VDD1:
static int tps65910_buck_set_value(struct udevice *dev, int uV)
{
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
if (pdata->unit == TPS65910_UNIT_VIO)
return tps65910_regulator_set_value(dev, &smps_props_vio, uV);
static int tps65910_boost_get_value(struct udevice *dev)
{
int vout;
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
vout = (pdata->supply >= 3000000) ? 5000000 : 0;
return vout;
struct udevice *supply;
int ret;
const char *supply_name;
- struct tps65910_regulator_pdata *pdata = dev_get_platdata(dev);
+ struct tps65910_regulator_pdata *pdata = dev_get_plat(dev);
pdata->unit = dev_get_driver_data(dev);
if (pdata->unit > TPS65910_UNIT_VMMC)
int imxrt_sdram_init(struct udevice *dev)
{
- struct imxrt_sdram_params *params = dev_get_platdata(dev);
+ struct imxrt_sdram_params *params = dev_get_plat(dev);
struct imxrt_sdram_mux *mux = params->sdram_mux;
struct imxrt_sdram_control *ctrl = params->sdram_control;
struct imxrt_sdram_timing *time = params->sdram_timing;
static int imxrt_semc_ofdata_to_platdata(struct udevice *dev)
{
- struct imxrt_sdram_params *params = dev_get_platdata(dev);
+ struct imxrt_sdram_params *params = dev_get_plat(dev);
ofnode bank_node;
u8 bank = 0;
static int imxrt_semc_probe(struct udevice *dev)
{
- struct imxrt_sdram_params *params = dev_get_platdata(dev);
+ struct imxrt_sdram_params *params = dev_get_plat(dev);
int ret;
fdt_addr_t addr;
static int sdram_col_row_detect(struct udevice *dev)
{
struct dram_info *priv = dev_get_priv(dev);
- struct rk3368_sdram_params *params = dev_get_platdata(dev);
+ struct rk3368_sdram_params *params = dev_get_plat(dev);
struct rk3368_ddr_pctl *pctl = priv->pctl;
struct rk3368_msch *msch = priv->msch;
const u32 test_pattern = 0x5aa5f00f;
{
struct dram_info *priv = dev_get_priv(dev);
struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
- struct rk3368_sdram_params *params = dev_get_platdata(dev);
+ struct rk3368_sdram_params *params = dev_get_plat(dev);
const struct rk3288_sdram_channel *info = ¶ms->chan;
u32 sys_reg = 0;
const int chan = 0;
static int setup_sdram(struct udevice *dev)
{
struct dram_info *priv = dev_get_priv(dev);
- struct rk3368_sdram_params *params = dev_get_platdata(dev);
+ struct rk3368_sdram_params *params = dev_get_plat(dev);
struct rk3368_ddr_pctl *pctl = priv->pctl;
struct rk3368_ddrphy *ddrphy = priv->phy;
int ret = 0;
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3368_sdram_params *plat = dev_get_platdata(dev);
+ struct rk3368_sdram_params *plat = dev_get_plat(dev);
ret = regmap_init_mem(dev_ofnode(dev), &plat->map);
if (ret)
#if CONFIG_IS_ENABLED(OF_PLATDATA)
static int conv_of_platdata(struct udevice *dev)
{
- struct rk3368_sdram_params *plat = dev_get_platdata(dev);
+ struct rk3368_sdram_params *plat = dev_get_plat(dev);
struct dtd_rockchip_rk3368_dmc *of_plat = &plat->of_plat;
plat->ddr_freq = of_plat->rockchip_ddr_frequency;
static int rk3368_dmc_probe(struct udevice *dev)
{
#ifdef CONFIG_TPL_BUILD
- struct rk3368_sdram_params *plat = dev_get_platdata(dev);
+ struct rk3368_sdram_params *plat = dev_get_plat(dev);
struct rk3368_ddr_pctl *pctl;
struct rk3368_ddrphy *ddrphy;
struct rk3368_cru *cru;
static int setup_sdram(struct udevice *dev)
{
struct dram_info *priv = dev_get_priv(dev);
- struct rk3188_sdram_params *params = dev_get_platdata(dev);
+ struct rk3188_sdram_params *params = dev_get_plat(dev);
return sdram_init(priv, params);
}
static int rk3188_dmc_ofdata_to_platdata(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3188_sdram_params *params = dev_get_platdata(dev);
+ struct rk3188_sdram_params *params = dev_get_plat(dev);
int ret;
/* rk3188 supports only one-channel */
#if CONFIG_IS_ENABLED(OF_PLATDATA)
static int conv_of_platdata(struct udevice *dev)
{
- struct rk3188_sdram_params *plat = dev_get_platdata(dev);
+ struct rk3188_sdram_params *plat = dev_get_plat(dev);
struct dtd_rockchip_rk3188_dmc *of_plat = &plat->of_plat;
int ret;
static int rk3188_dmc_probe(struct udevice *dev)
{
#ifdef CONFIG_SPL_BUILD
- struct rk3188_sdram_params *plat = dev_get_platdata(dev);
+ struct rk3188_sdram_params *plat = dev_get_plat(dev);
struct regmap *map;
struct udevice *dev_clk;
int ret;
static int rk322x_dmc_ofdata_to_platdata(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk322x_sdram_params *params = dev_get_platdata(dev);
+ struct rk322x_sdram_params *params = dev_get_plat(dev);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(dev);
int ret;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
static int conv_of_platdata(struct udevice *dev)
{
- struct rk322x_sdram_params *plat = dev_get_platdata(dev);
+ struct rk322x_sdram_params *plat = dev_get_plat(dev);
struct dtd_rockchip_rk322x_dmc *of_plat = &plat->of_plat;
int ret;
static int rk322x_dmc_probe(struct udevice *dev)
{
#ifdef CONFIG_TPL_BUILD
- struct rk322x_sdram_params *plat = dev_get_platdata(dev);
+ struct rk322x_sdram_params *plat = dev_get_plat(dev);
int ret;
struct udevice *dev_clk;
#endif
static int setup_sdram(struct udevice *dev)
{
struct dram_info *priv = dev_get_priv(dev);
- struct rk3288_sdram_params *params = dev_get_platdata(dev);
+ struct rk3288_sdram_params *params = dev_get_plat(dev);
# ifdef CONFIG_ROCKCHIP_FAST_SPL
if (priv->is_veyron) {
static int rk3288_dmc_ofdata_to_platdata(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3288_sdram_params *params = dev_get_platdata(dev);
+ struct rk3288_sdram_params *params = dev_get_plat(dev);
int ret;
/* Rk3288 supports dual-channel, set default channel num to 2 */
#if CONFIG_IS_ENABLED(OF_PLATDATA)
static int conv_of_platdata(struct udevice *dev)
{
- struct rk3288_sdram_params *plat = dev_get_platdata(dev);
+ struct rk3288_sdram_params *plat = dev_get_plat(dev);
struct dtd_rockchip_rk3288_dmc *of_plat = &plat->of_plat;
int ret;
{
#if defined(CONFIG_TPL_BUILD) || \
(!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD))
- struct rk3288_sdram_params *plat = dev_get_platdata(dev);
+ struct rk3288_sdram_params *plat = dev_get_plat(dev);
struct udevice *dev_clk;
struct regmap *map;
int ret;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
static int conv_of_platdata(struct udevice *dev)
{
- struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_dmc_plat *plat = dev_get_plat(dev);
struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat;
int ret;
static int rk3328_dmc_init(struct udevice *dev)
{
struct dram_info *priv = dev_get_priv(dev);
- struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_dmc_plat *plat = dev_get_plat(dev);
int ret;
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
static int rk3328_dmc_ofdata_to_platdata(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_dmc_plat *plat = dev_get_plat(dev);
int ret;
ret = dev_read_u32_array(dev, "rockchip,sdram-params",
static int rk3399_dmc_ofdata_to_platdata(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_dmc_plat *plat = dev_get_plat(dev);
int ret;
ret = dev_read_u32_array(dev, "rockchip,sdram-params",
#if CONFIG_IS_ENABLED(OF_PLATDATA)
static int conv_of_platdata(struct udevice *dev)
{
- struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_dmc_plat *plat = dev_get_plat(dev);
struct dtd_rockchip_rk3399_dmc *dtplat = &plat->dtplat;
int ret;
static int rk3399_dmc_init(struct udevice *dev)
{
struct dram_info *priv = dev_get_priv(dev);
- struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+ struct rockchip_dmc_plat *plat = dev_get_plat(dev);
int ret;
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3399_sdram_params *params = &plat->sdram_params;
static int fu540_ddr_setup(struct udevice *dev)
{
struct fu540_ddr_info *priv = dev_get_priv(dev);
- struct sifive_dmc_plat *plat = dev_get_platdata(dev);
+ struct sifive_dmc_plat *plat = dev_get_plat(dev);
struct fu540_ddr_params *params = &plat->ddr_params;
volatile u32 *denali_ctl = priv->ctl->denali_ctl;
volatile u32 *denali_phy = priv->phy->denali_phy;
int stm32_sdram_init(struct udevice *dev)
{
- struct stm32_sdram_params *params = dev_get_platdata(dev);
+ struct stm32_sdram_params *params = dev_get_plat(dev);
struct stm32_sdram_control *control;
struct stm32_sdram_timing *timing;
struct stm32_fmc_regs *regs = params->base;
static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
{
- struct stm32_sdram_params *params = dev_get_platdata(dev);
+ struct stm32_sdram_params *params = dev_get_plat(dev);
struct bank_params *bank_params;
struct ofnode_phandle_args args;
u32 *syscfg_base;
static int stm32_fmc_probe(struct udevice *dev)
{
- struct stm32_sdram_params *params = dev_get_platdata(dev);
+ struct stm32_sdram_params *params = dev_get_plat(dev);
int ret;
fdt_addr_t addr;
*/
static int meson_rng_read(struct udevice *dev, void *data, size_t len)
{
- struct meson_rng_platdata *pdata = dev_get_platdata(dev);
+ struct meson_rng_platdata *pdata = dev_get_plat(dev);
char *buffer = (char *)data;
while (len) {
*/
static int meson_rng_probe(struct udevice *dev)
{
- struct meson_rng_platdata *pdata = dev_get_platdata(dev);
+ struct meson_rng_platdata *pdata = dev_get_plat(dev);
int err;
err = clk_enable(&pdata->clk);
*/
static int meson_rng_remove(struct udevice *dev)
{
- struct meson_rng_platdata *pdata = dev_get_platdata(dev);
+ struct meson_rng_platdata *pdata = dev_get_plat(dev);
return clk_disable(&pdata->clk);
}
*/
static int meson_rng_ofdata_to_platdata(struct udevice *dev)
{
- struct meson_rng_platdata *pdata = dev_get_platdata(dev);
+ struct meson_rng_platdata *pdata = dev_get_plat(dev);
int err;
pdata->base = dev_read_addr(dev);
int retval, i;
u32 sr, count, reg;
size_t increment;
- struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
+ struct stm32_rng_platdata *pdata = dev_get_plat(dev);
while (len > 0) {
retval = readl_poll_timeout(pdata->base + RNG_SR, sr,
static int stm32_rng_probe(struct udevice *dev)
{
- struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
+ struct stm32_rng_platdata *pdata = dev_get_plat(dev);
reset_assert(&pdata->rst);
udelay(20);
static int stm32_rng_remove(struct udevice *dev)
{
- struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
+ struct stm32_rng_platdata *pdata = dev_get_plat(dev);
return stm32_rng_cleanup(pdata);
}
static int stm32_rng_ofdata_to_platdata(struct udevice *dev)
{
- struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
+ struct stm32_rng_platdata *pdata = dev_get_plat(dev);
int err;
pdata->base = dev_read_addr(dev);
long sandbox_i2c_rtc_set_offset(struct udevice *dev, bool use_system_time,
int offset)
{
- struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(dev);
long old_offset;
old_offset = plat->offset;
long sandbox_i2c_rtc_get_set_base_time(struct udevice *dev, long base_time)
{
- struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(dev);
long old_base_time;
old_base_time = plat->base_time;
static void reset_time(struct udevice *dev)
{
- struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(dev);
struct rtc_time now;
os_localtime(&now);
static int sandbox_i2c_rtc_get(struct udevice *dev, struct rtc_time *time)
{
- struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(dev);
struct rtc_time tm_now;
long now;
static int sandbox_i2c_rtc_set(struct udevice *dev, const struct rtc_time *time)
{
- struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(dev);
struct rtc_time tm_now;
long now;
/* Update the current time in the registers */
static int sandbox_i2c_rtc_prepare_read(struct udevice *emul)
{
- struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(emul);
+ struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(emul);
struct rtc_time time;
int ret;
static int sandbox_i2c_rtc_complete_write(struct udevice *emul)
{
- struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(emul);
+ struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(emul);
struct rtc_time time;
int ret;
static int sandbox_i2c_rtc_xfer(struct udevice *emul, struct i2c_msg *msg,
int nmsgs)
{
- struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(emul);
+ struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(emul);
uint offset = 0;
int ret;
#ifdef CONFIG_DM_RTC
static int mv_rtc_get(struct udevice *dev, struct rtc_time *tm)
{
- struct mvrtc_pdata *pdata = dev_get_platdata(dev);
+ struct mvrtc_pdata *pdata = dev_get_plat(dev);
struct mvrtc_registers *regs = (struct mvrtc_registers *)pdata->iobase;
return __mv_rtc_get(regs, tm);
static int mv_rtc_set(struct udevice *dev, const struct rtc_time *tm)
{
- struct mvrtc_pdata *pdata = dev_get_platdata(dev);
+ struct mvrtc_pdata *pdata = dev_get_plat(dev);
struct mvrtc_registers *regs = (struct mvrtc_registers *)pdata->iobase;
return __mv_rtc_set(regs, tm);
static int mv_rtc_reset(struct udevice *dev)
{
- struct mvrtc_pdata *pdata = dev_get_platdata(dev);
+ struct mvrtc_pdata *pdata = dev_get_plat(dev);
struct mvrtc_registers *regs = (struct mvrtc_registers *)pdata->iobase;
__mv_rtc_reset(regs);
static int mv_rtc_ofdata_to_platdata(struct udevice *dev)
{
- struct mvrtc_pdata *pdata = dev_get_platdata(dev);
+ struct mvrtc_pdata *pdata = dev_get_plat(dev);
pdata->iobase = dev_read_addr(dev);
return 0;
static inline u32 pl031_read_reg(struct udevice *dev, int reg)
{
- struct pl031_platdata *pdata = dev_get_platdata(dev);
+ struct pl031_platdata *pdata = dev_get_plat(dev);
return readl(pdata->base + reg);
}
static inline u32 pl031_write_reg(struct udevice *dev, int reg, u32 value)
{
- struct pl031_platdata *pdata = dev_get_platdata(dev);
+ struct pl031_platdata *pdata = dev_get_plat(dev);
return writel(value, pdata->base + reg);
}
static int pl031_ofdata_to_platdata(struct udevice *dev)
{
- struct pl031_platdata *pdata = dev_get_platdata(dev);
+ struct pl031_platdata *pdata = dev_get_plat(dev);
pdata->base = dev_read_addr(dev);
static int altera_jtaguart_ofdata_to_platdata(struct udevice *dev)
{
- struct altera_jtaguart_platdata *plat = dev_get_platdata(dev);
+ struct altera_jtaguart_platdata *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev),
sizeof(struct altera_jtaguart_regs),
static int altera_uart_ofdata_to_platdata(struct udevice *dev)
{
- struct altera_uart_platdata *plat = dev_get_platdata(dev);
+ struct altera_uart_platdata *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev),
sizeof(struct altera_uart_regs),
static int lpc32xx_hsuart_probe(struct udevice *dev)
{
- struct lpc32xx_hsuart_platdata *plat = dev_get_platdata(dev);
+ struct lpc32xx_hsuart_platdata *plat = dev_get_plat(dev);
struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
priv->hsuart = (struct hsuart_regs *)plat->base;
if (!ret)
reset_deassert_bulk(&reset_bulk);
- com_port->plat = dev_get_platdata(dev);
+ com_port->plat = dev_get_plat(dev);
NS16550_init(com_port, -1);
return 0;
static int arc_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct arc_serial_platdata *plat = dev_get_platdata(dev);
+ struct arc_serial_platdata *plat = dev_get_plat(dev);
DECLARE_GLOBAL_DATA_PTR;
plat->reg = dev_read_addr_ptr(dev);
static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
+ struct bcm283x_mu_serial_platdata *plat = dev_get_plat(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
struct bcm283x_mu_regs *regs = priv->regs;
u32 divider;
static int bcm283x_mu_serial_probe(struct udevice *dev)
{
- struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
+ struct bcm283x_mu_serial_platdata *plat = dev_get_plat(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
fdt_addr_t addr;
static int bcm283x_pl011_serial_probe(struct udevice *dev)
{
- struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
+ struct pl01x_serial_platdata *plat = dev_get_plat(dev);
int ret;
/* Don't spawn the device if it's not muxed */
static int coreboot_ofdata_to_platdata(struct udevice *dev)
{
- struct ns16550_platdata *plat = dev_get_platdata(dev);
+ struct ns16550_platdata *plat = dev_get_plat(dev);
struct cb_serial *cb_info = lib_sysinfo.serial;
plat->base = cb_info->baseaddr;
static int mid_serial_probe(struct udevice *dev)
{
- struct ns16550_platdata *plat = dev_get_platdata(dev);
+ struct ns16550_platdata *plat = dev_get_plat(dev);
/*
* Initialize fractional divider correctly for Intel Edison
static void _lpuart_serial_setbrg(struct udevice *dev,
int baudrate)
{
- struct lpuart_serial_platdata *plat = dev_get_platdata(dev);
+ struct lpuart_serial_platdata *plat = dev_get_plat(dev);
struct lpuart_fsl *base = plat->reg;
u32 clk;
u16 sbr;
*/
static int _lpuart_serial_init(struct udevice *dev)
{
- struct lpuart_serial_platdata *plat = dev_get_platdata(dev);
+ struct lpuart_serial_platdata *plat = dev_get_plat(dev);
struct lpuart_fsl *base = (struct lpuart_fsl *)plat->reg;
u8 ctrl;
static void _lpuart32_serial_setbrg_7ulp(struct udevice *dev,
int baudrate)
{
- struct lpuart_serial_platdata *plat = dev_get_platdata(dev);
+ struct lpuart_serial_platdata *plat = dev_get_plat(dev);
struct lpuart_fsl_reg32 *base = plat->reg;
u32 sbr, osr, baud_diff, tmp_osr, tmp_sbr, tmp_diff, tmp;
u32 clk;
static void _lpuart32_serial_setbrg(struct udevice *dev,
int baudrate)
{
- struct lpuart_serial_platdata *plat = dev_get_platdata(dev);
+ struct lpuart_serial_platdata *plat = dev_get_plat(dev);
struct lpuart_fsl_reg32 *base = plat->reg;
u32 clk;
u32 sbr;
*/
static int _lpuart32_serial_init(struct udevice *dev)
{
- struct lpuart_serial_platdata *plat = dev_get_platdata(dev);
+ struct lpuart_serial_platdata *plat = dev_get_plat(dev);
struct lpuart_fsl_reg32 *base = (struct lpuart_fsl_reg32 *)plat->reg;
u32 val, tx_fifo_size;
static int lpuart_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct lpuart_serial_platdata *plat = dev_get_platdata(dev);
+ struct lpuart_serial_platdata *plat = dev_get_plat(dev);
if (is_lpuart32(dev)) {
if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 ||
static int coldfire_ofdata_to_platdata(struct udevice *dev)
{
- struct coldfire_serial_platdata *plat = dev_get_platdata(dev);
+ struct coldfire_serial_platdata *plat = dev_get_plat(dev);
fdt_addr_t addr_base;
addr_base = dev_read_addr(dev);
static int mvebu_serial_putc(struct udevice *dev, const char ch)
{
- struct mvebu_platdata *plat = dev_get_platdata(dev);
+ struct mvebu_platdata *plat = dev_get_plat(dev);
void __iomem *base = plat->base;
while (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL)
static int mvebu_serial_getc(struct udevice *dev)
{
- struct mvebu_platdata *plat = dev_get_platdata(dev);
+ struct mvebu_platdata *plat = dev_get_plat(dev);
void __iomem *base = plat->base;
while (!(readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY))
static int mvebu_serial_pending(struct udevice *dev, bool input)
{
- struct mvebu_platdata *plat = dev_get_platdata(dev);
+ struct mvebu_platdata *plat = dev_get_plat(dev);
void __iomem *base = plat->base;
if (readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY)
static int mvebu_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct mvebu_platdata *plat = dev_get_platdata(dev);
+ struct mvebu_platdata *plat = dev_get_plat(dev);
void __iomem *base = plat->base;
/*
static int mvebu_serial_probe(struct udevice *dev)
{
- struct mvebu_platdata *plat = dev_get_platdata(dev);
+ struct mvebu_platdata *plat = dev_get_plat(dev);
void __iomem *base = plat->base;
/* reset FIFOs */
static int mvebu_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct mvebu_platdata *plat = dev_get_platdata(dev);
+ struct mvebu_platdata *plat = dev_get_plat(dev);
plat->base = dev_read_addr_ptr(dev);
int pl01x_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
+ struct pl01x_serial_platdata *plat = dev_get_plat(dev);
struct pl01x_priv *priv = dev_get_priv(dev);
if (!plat->skip_init) {
int pl01x_serial_probe(struct udevice *dev)
{
- struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
+ struct pl01x_serial_platdata *plat = dev_get_plat(dev);
struct pl01x_priv *priv = dev_get_priv(dev);
priv->regs = (struct pl01x_regs *)plat->base;
int pl01x_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
+ struct pl01x_serial_platdata *plat = dev_get_plat(dev);
struct clk clk;
fdt_addr_t addr;
int ret;
static int rockchip_serial_probe(struct udevice *dev)
{
- struct rockchip_uart_platdata *plat = dev_get_platdata(dev);
+ struct rockchip_uart_platdata *plat = dev_get_plat(dev);
/* Create some new platform data for the standard driver */
plat->plat.base = plat->dtplat.reg[0];
static int sh_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct sh_serial_platdata *plat = dev_get_platdata(dev);
+ struct sh_serial_platdata *plat = dev_get_plat(dev);
struct uart_port *priv = dev_get_priv(dev);
sh_serial_setbrg_generic(priv, plat->clk, baudrate);
static int sh_serial_probe(struct udevice *dev)
{
- struct sh_serial_platdata *plat = dev_get_platdata(dev);
+ struct sh_serial_platdata *plat = dev_get_plat(dev);
struct uart_port *priv = dev_get_priv(dev);
priv->membase = (unsigned char *)plat->base;
static int sh_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct sh_serial_platdata *plat = dev_get_platdata(dev);
+ struct sh_serial_platdata *plat = dev_get_plat(dev);
struct clk sh_serial_clk;
fdt_addr_t addr;
int ret;
{
int ret;
struct clk clk;
- struct sifive_uart_platdata *plat = dev_get_platdata(dev);
+ struct sifive_uart_platdata *plat = dev_get_plat(dev);
u32 clock = 0;
ret = clk_get_by_index(dev, 0, &clk);
static int sifive_serial_probe(struct udevice *dev)
{
- struct sifive_uart_platdata *plat = dev_get_platdata(dev);
+ struct sifive_uart_platdata *plat = dev_get_plat(dev);
/* No need to reinitialize the UART after relocation */
if (gd->flags & GD_FLG_RELOC)
static int sifive_serial_getc(struct udevice *dev)
{
int c;
- struct sifive_uart_platdata *plat = dev_get_platdata(dev);
+ struct sifive_uart_platdata *plat = dev_get_plat(dev);
struct uart_sifive *regs = plat->regs;
while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ;
static int sifive_serial_putc(struct udevice *dev, const char ch)
{
int rc;
- struct sifive_uart_platdata *plat = dev_get_platdata(dev);
+ struct sifive_uart_platdata *plat = dev_get_plat(dev);
while ((rc = _sifive_serial_putc(plat->regs, ch)) == -EAGAIN) ;
static int sifive_serial_pending(struct udevice *dev, bool input)
{
- struct sifive_uart_platdata *plat = dev_get_platdata(dev);
+ struct sifive_uart_platdata *plat = dev_get_plat(dev);
struct uart_sifive *regs = plat->regs;
if (input)
static int sifive_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct sifive_uart_platdata *plat = dev_get_platdata(dev);
+ struct sifive_uart_platdata *plat = dev_get_plat(dev);
plat->regs = (struct uart_sifive *)dev_read_addr(dev);
if (IS_ERR(plat->regs))
static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
_stm32_serial_setbrg(plat->base, plat->uart_info,
plat->clock_rate, baudrate);
static int stm32_serial_setconfig(struct udevice *dev, uint serial_config)
{
- struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
bool stm32f4 = plat->uart_info->stm32f4;
u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
static int stm32_serial_getc(struct udevice *dev)
{
- struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
bool stm32f4 = plat->uart_info->stm32f4;
fdt_addr_t base = plat->base;
u32 isr = readl(base + ISR_OFFSET(stm32f4));
static int stm32_serial_putc(struct udevice *dev, const char c)
{
- struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
return _stm32_serial_putc(plat->base, plat->uart_info, c);
}
static int stm32_serial_pending(struct udevice *dev, bool input)
{
- struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
bool stm32f4 = plat->uart_info->stm32f4;
fdt_addr_t base = plat->base;
static int stm32_serial_probe(struct udevice *dev)
{
- struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
struct clk clk;
struct reset_ctl reset;
int ret;
static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
plat->base = dev_read_addr(dev);
if (plat->base == FDT_ADDR_T_NONE)
static int uartlite_serial_putc(struct udevice *dev, const char ch)
{
- struct uartlite_platdata *plat = dev_get_platdata(dev);
+ struct uartlite_platdata *plat = dev_get_plat(dev);
struct uartlite *regs = plat->regs;
if (uart_in32(®s->status) & SR_TX_FIFO_FULL)
static int uartlite_serial_getc(struct udevice *dev)
{
- struct uartlite_platdata *plat = dev_get_platdata(dev);
+ struct uartlite_platdata *plat = dev_get_plat(dev);
struct uartlite *regs = plat->regs;
if (!(uart_in32(®s->status) & SR_RX_FIFO_VALID_DATA))
static int uartlite_serial_pending(struct udevice *dev, bool input)
{
- struct uartlite_platdata *plat = dev_get_platdata(dev);
+ struct uartlite_platdata *plat = dev_get_plat(dev);
struct uartlite *regs = plat->regs;
if (input)
static int uartlite_serial_probe(struct udevice *dev)
{
- struct uartlite_platdata *plat = dev_get_platdata(dev);
+ struct uartlite_platdata *plat = dev_get_plat(dev);
struct uartlite *regs = plat->regs;
int ret;
static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct uartlite_platdata *plat = dev_get_platdata(dev);
+ struct uartlite_platdata *plat = dev_get_plat(dev);
plat->regs = dev_read_addr_ptr(dev);
static int zynq_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct zynq_uart_platdata *plat = dev_get_platdata(dev);
+ struct zynq_uart_platdata *plat = dev_get_plat(dev);
unsigned long clock;
int ret;
static int zynq_serial_probe(struct udevice *dev)
{
- struct zynq_uart_platdata *plat = dev_get_platdata(dev);
+ struct zynq_uart_platdata *plat = dev_get_plat(dev);
struct uart_zynq *regs = plat->regs;
u32 val;
static int zynq_serial_getc(struct udevice *dev)
{
- struct zynq_uart_platdata *plat = dev_get_platdata(dev);
+ struct zynq_uart_platdata *plat = dev_get_plat(dev);
struct uart_zynq *regs = plat->regs;
if (readl(®s->channel_sts) & ZYNQ_UART_SR_RXEMPTY)
static int zynq_serial_putc(struct udevice *dev, const char ch)
{
- struct zynq_uart_platdata *plat = dev_get_platdata(dev);
+ struct zynq_uart_platdata *plat = dev_get_plat(dev);
return _uart_zynq_serial_putc(plat->regs, ch);
}
static int zynq_serial_pending(struct udevice *dev, bool input)
{
- struct zynq_uart_platdata *plat = dev_get_platdata(dev);
+ struct zynq_uart_platdata *plat = dev_get_plat(dev);
struct uart_zynq *regs = plat->regs;
if (input)
static int zynq_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct zynq_uart_platdata *plat = dev_get_platdata(dev);
+ struct zynq_uart_platdata *plat = dev_get_plat(dev);
plat->regs = (struct uart_zynq *)dev_read_addr(dev);
if (IS_ERR(plat->regs))
static int soc_ti_k3_get_family(struct udevice *dev, char *buf, int size)
{
- struct soc_ti_k3_platdata *plat = dev_get_platdata(dev);
+ struct soc_ti_k3_platdata *plat = dev_get_plat(dev);
snprintf(buf, size, "%s", plat->family);
static int soc_ti_k3_get_revision(struct udevice *dev, char *buf, int size)
{
- struct soc_ti_k3_platdata *plat = dev_get_platdata(dev);
+ struct soc_ti_k3_platdata *plat = dev_get_plat(dev);
snprintf(buf, size, "SR%s", plat->revision);
int soc_ti_k3_probe(struct udevice *dev)
{
- struct soc_ti_k3_platdata *plat = dev_get_platdata(dev);
+ struct soc_ti_k3_platdata *plat = dev_get_plat(dev);
u32 idreg;
void *idreg_addr;
static int altera_spi_probe(struct udevice *bus)
{
- struct altera_spi_platdata *plat = dev_get_platdata(bus);
+ struct altera_spi_platdata *plat = dev_get_plat(bus);
struct altera_spi_priv *priv = dev_get_priv(bus);
priv->regs = plat->regs;
static int altera_spi_ofdata_to_platdata(struct udevice *bus)
{
- struct altera_spi_platdata *plat = dev_get_platdata(bus);
+ struct altera_spi_platdata *plat = dev_get_plat(bus);
plat->regs = map_physmem(dev_read_addr(bus),
sizeof(struct altera_spi_regs),
static int atmel_spi_claim_bus(struct udevice *dev)
{
struct udevice *bus = dev_get_parent(dev);
- struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus);
+ struct atmel_spi_platdata *bus_plat = dev_get_plat(bus);
struct atmel_spi_priv *priv = dev_get_priv(bus);
struct dm_spi_slave_platdata *slave_plat = dev_get_parent_plat(dev);
struct at91_spi *reg_base = bus_plat->regs;
static int atmel_spi_release_bus(struct udevice *dev)
{
struct udevice *bus = dev_get_parent(dev);
- struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus);
+ struct atmel_spi_platdata *bus_plat = dev_get_plat(bus);
writel(ATMEL_SPI_CR_SPIDIS, &bus_plat->regs->cr);
const void *dout, void *din, unsigned long flags)
{
struct udevice *bus = dev_get_parent(dev);
- struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus);
+ struct atmel_spi_platdata *bus_plat = dev_get_plat(bus);
struct at91_spi *reg_base = bus_plat->regs;
u32 len_tx, len_rx, len;
static int atmel_spi_probe(struct udevice *bus)
{
- struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus);
+ struct atmel_spi_platdata *bus_plat = dev_get_plat(bus);
int ret;
ret = atmel_spi_enable_clk(bus);
static int bcmstb_spi_ofdata_to_platdata(struct udevice *bus)
{
- struct bcmstb_spi_platdata *plat = dev_get_platdata(bus);
+ struct bcmstb_spi_platdata *plat = dev_get_plat(bus);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(bus);
int ret = 0;
static int bcmstb_spi_probe(struct udevice *bus)
{
- struct bcmstb_spi_platdata *plat = dev_get_platdata(bus);
+ struct bcmstb_spi_platdata *plat = dev_get_plat(bus);
struct bcmstb_spi_priv *priv = dev_get_priv(bus);
priv->regs = plat->base[HIF_MSPI];
static int coldfire_spi_probe(struct udevice *bus)
{
- struct coldfire_spi_platdata *plat = dev_get_platdata(bus);
+ struct coldfire_spi_platdata *plat = dev_get_plat(bus);
struct coldfire_spi_priv *cfspi = dev_get_priv(bus);
struct dspi *dspi = cfspi->regs;
int i;
static int dw_spi_probe(struct udevice *bus)
{
- struct dw_spi_platdata *plat = dev_get_platdata(bus);
+ struct dw_spi_platdata *plat = dev_get_plat(bus);
struct dw_spi_priv *priv = dev_get_priv(bus);
int ret;
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct exynos_spi_platdata *pdata = dev_get_platdata(bus);
+ struct exynos_spi_platdata *pdata = dev_get_plat(bus);
struct exynos_spi_priv *priv = dev_get_priv(bus);
/* If it's too soon to do another transaction, wait */
static void spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct exynos_spi_platdata *pdata = dev_get_platdata(bus);
+ struct exynos_spi_platdata *pdata = dev_get_plat(bus);
struct exynos_spi_priv *priv = dev_get_priv(bus);
setbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT);
static int exynos_spi_probe(struct udevice *bus)
{
- struct exynos_spi_platdata *plat = dev_get_platdata(bus);
+ struct exynos_spi_platdata *plat = dev_get_plat(bus);
struct exynos_spi_priv *priv = dev_get_priv(bus);
priv->regs = plat->regs;
static int fsl_dspi_probe(struct udevice *bus)
{
- struct fsl_dspi_platdata *plat = dev_get_platdata(bus);
+ struct fsl_dspi_platdata *plat = dev_get_plat(bus);
struct fsl_dspi_priv *priv = dev_get_priv(bus);
struct dm_spi_bus *dm_spi_bus;
uint mcr_cfg_val;
static int fsl_espi_probe(struct udevice *bus)
{
- struct fsl_espi_platdata *plat = dev_get_platdata(bus);
+ struct fsl_espi_platdata *plat = dev_get_plat(bus);
struct fsl_spi_slave *fsl = dev_get_priv(bus);
fsl->espi = (ccsr_espi_t *)((u32)plat->regs_addr);
const struct spi_mem_op *op)
{
struct udevice *bus = dev_get_parent(slave->dev);
- struct ich_spi_platdata *plat = dev_get_platdata(bus);
+ struct ich_spi_platdata *plat = dev_get_plat(bus);
struct ich_spi_priv *ctlr = dev_get_priv(bus);
uint16_t control;
int16_t opcode_index;
static int ich_spi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
{
struct udevice *bus = dev_get_parent(slave->dev);
- struct ich_spi_platdata *plat = dev_get_platdata(bus);
+ struct ich_spi_platdata *plat = dev_get_plat(bus);
int ret;
bootstage_start(BOOTSTAGE_ID_ACCUM_SPI, "fast_spi");
offsetp);
}
#else
- struct ich_spi_platdata *plat = dev_get_platdata(bus);
+ struct ich_spi_platdata *plat = dev_get_plat(bus);
/*
* We cannot rely on plat->bdf being set up yet since this method can
static int ich_protect_lockdown(struct udevice *dev)
{
- struct ich_spi_platdata *plat = dev_get_platdata(dev);
+ struct ich_spi_platdata *plat = dev_get_plat(dev);
struct ich_spi_priv *priv = dev_get_priv(dev);
int ret = -ENOSYS;
struct ich_spi_priv *ctlr)
{
if (spl_phase() == PHASE_TPL) {
- struct ich_spi_platdata *plat = dev_get_platdata(dev);
+ struct ich_spi_platdata *plat = dev_get_plat(dev);
int ret;
ret = fast_spi_early_init(plat->bdf, plat->mmio_base);
static int ich_spi_probe(struct udevice *dev)
{
- struct ich_spi_platdata *plat = dev_get_platdata(dev);
+ struct ich_spi_platdata *plat = dev_get_plat(dev);
struct ich_spi_priv *priv = dev_get_priv(dev);
int ret;
static int ich_spi_child_pre_probe(struct udevice *dev)
{
struct udevice *bus = dev_get_parent(dev);
- struct ich_spi_platdata *plat = dev_get_platdata(bus);
+ struct ich_spi_platdata *plat = dev_get_plat(bus);
struct ich_spi_priv *priv = dev_get_priv(bus);
struct spi_slave *slave = dev_get_parent_priv(dev);
static int ich_spi_ofdata_to_platdata(struct udevice *dev)
{
- struct ich_spi_platdata *plat = dev_get_platdata(dev);
+ struct ich_spi_platdata *plat = dev_get_plat(dev);
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct ich_spi_priv *priv = dev_get_priv(dev);
static int mvebu_spi_set_speed(struct udevice *bus, uint hz)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
struct kwspi_registers *reg = plat->spireg;
u32 data;
static void mvebu_spi_50mhz_ac_timing_erratum(struct udevice *bus, uint mode)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
struct kwspi_registers *reg = plat->spireg;
u32 data;
static int mvebu_spi_set_mode(struct udevice *bus, uint mode)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
struct kwspi_registers *reg = plat->spireg;
u32 data = readl(®->cfg);
const void *dout, void *din, unsigned long flags)
{
struct udevice *bus = dev->parent;
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
return _spi_xfer(plat->spireg, bitlen, dout, din, flags);
}
static int mvebu_spi_claim_bus(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
/* Configure the chip-select in the CTRL register */
clrsetbits_le32(&plat->spireg->ctrl,
static int mvebu_spi_probe(struct udevice *bus)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
struct kwspi_registers *reg = plat->spireg;
writel(KWSPI_SMEMRDY, ®->ctrl);
static int mvebu_spi_ofdata_to_platdata(struct udevice *bus)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
const struct mvebu_spi_dev *drvdata =
(struct mvebu_spi_dev *)dev_get_driver_data(bus);
const void *dout, void *din, unsigned long flags)
{
struct udevice *bus = dev->parent;
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
struct spi_reg *reg = plat->spireg;
unsigned int bytelen;
int ret;
static int mvebu_spi_set_speed(struct udevice *bus, uint hz)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
struct spi_reg *reg = plat->spireg;
u32 data, prescale;
static int mvebu_spi_set_mode(struct udevice *bus, uint mode)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
struct spi_reg *reg = plat->spireg;
/*
static int mvebu_spi_probe(struct udevice *bus)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
struct spi_reg *reg = plat->spireg;
u32 data;
int ret;
static int mvebu_spi_ofdata_to_platdata(struct udevice *bus)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
int ret;
plat->spireg = dev_read_addr_ptr(bus);
static int mvebu_spi_remove(struct udevice *bus)
{
- struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+ struct mvebu_spi_platdata *plat = dev_get_plat(bus);
clk_free(&plat->clk);
static int mxc_spi_probe(struct udevice *bus)
{
- struct mxc_spi_slave *mxcs = dev_get_platdata(bus);
+ struct mxc_spi_slave *mxcs = dev_get_plat(bus);
int node = dev_of_offset(bus);
const void *blob = gd->fdt_blob;
int ret;
static int mxc_spi_xfer(struct udevice *dev, unsigned int bitlen,
const void *dout, void *din, unsigned long flags)
{
- struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent);
+ struct mxc_spi_slave *mxcs = dev_get_plat(dev->parent);
return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags);
static int mxc_spi_claim_bus(struct udevice *dev)
{
- struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent);
+ struct mxc_spi_slave *mxcs = dev_get_plat(dev->parent);
struct dm_spi_slave_platdata *slave_plat = dev_get_parent_plat(dev);
mxcs->dev = dev;
static int mxc_spi_set_mode(struct udevice *bus, uint mode)
{
- struct mxc_spi_slave *mxcs = dev_get_platdata(bus);
+ struct mxc_spi_slave *mxcs = dev_get_plat(bus);
mxcs->mode = mode;
mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0;
static int mxs_spi_probe(struct udevice *bus)
{
- struct mxs_spi_platdata *plat = dev_get_platdata(bus);
+ struct mxs_spi_platdata *plat = dev_get_plat(bus);
struct mxs_spi_priv *priv = dev_get_priv(bus);
int ret;
static int omap3_spi_probe(struct udevice *dev)
{
struct omap3_spi_priv *priv = dev_get_priv(dev);
- struct omap3_spi_plat *plat = dev_get_platdata(dev);
+ struct omap3_spi_plat *plat = dev_get_plat(dev);
priv->regs = plat->regs;
priv->pin_dir = plat->pin_dir;
{
struct omap2_mcspi_platform_config *data =
(struct omap2_mcspi_platform_config *)dev_get_driver_data(dev);
- struct omap3_spi_plat *plat = dev_get_platdata(dev);
+ struct omap3_spi_plat *plat = dev_get_plat(dev);
plat->regs = (struct mcspi *)(dev_read_addr(dev) + data->regs_offset);
static int pl022_spi_probe(struct udevice *bus)
{
- struct pl022_spi_pdata *plat = dev_get_platdata(bus);
+ struct pl022_spi_pdata *plat = dev_get_plat(bus);
struct pl022_spi_slave *ps = dev_get_priv(bus);
ps->base = ioremap(plat->addr, plat->size);
static int rpc_spi_probe(struct udevice *dev)
{
- struct rpc_spi_platdata *plat = dev_get_platdata(dev);
+ struct rpc_spi_platdata *plat = dev_get_plat(dev);
struct rpc_spi_priv *priv = dev_get_priv(dev);
priv->regs = plat->regs;
static int rpc_spi_ofdata_to_platdata(struct udevice *bus)
{
- struct rpc_spi_platdata *plat = dev_get_platdata(bus);
+ struct rpc_spi_platdata *plat = dev_get_plat(bus);
plat->regs = dev_read_addr_index(bus, 0);
plat->extr = dev_read_addr_index(bus, 1);
static int rockchip_spi_ofdata_to_platdata(struct udevice *bus)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rockchip_spi_platdata *plat = dev_get_platdata(bus);
+ struct rockchip_spi_platdata *plat = dev_get_plat(bus);
struct rockchip_spi_priv *priv = dev_get_priv(bus);
int ret;
static int rockchip_spi_probe(struct udevice *bus)
{
- struct rockchip_spi_platdata *plat = dev_get_platdata(bus);
+ struct rockchip_spi_platdata *plat = dev_get_plat(bus);
struct rockchip_spi_priv *priv = dev_get_priv(bus);
int ret;
const void *dout, void *din, unsigned long flags)
{
struct udevice *bus = dev->parent;
- struct sh_qspi_slave *ss = dev_get_platdata(bus);
+ struct sh_qspi_slave *ss = dev_get_plat(bus);
return sh_qspi_xfer_common(ss, bitlen, dout, din, flags);
}
static int sh_qspi_probe(struct udevice *dev)
{
- struct sh_qspi_slave *ss = dev_get_platdata(dev);
+ struct sh_qspi_slave *ss = dev_get_plat(dev);
sh_qspi_init(ss);
static int sh_qspi_ofdata_to_platdata(struct udevice *dev)
{
- struct sh_qspi_slave *plat = dev_get_platdata(dev);
+ struct sh_qspi_slave *plat = dev_get_plat(dev);
plat->regs = (struct sh_qspi_regs *)dev_read_addr(dev);
static int soft_spi_scl(struct udevice *dev, int bit)
{
struct udevice *bus = dev_get_parent(dev);
- struct soft_spi_platdata *plat = dev_get_platdata(bus);
+ struct soft_spi_platdata *plat = dev_get_plat(bus);
dm_gpio_set_value(&plat->sclk, bit);
static int soft_spi_sda(struct udevice *dev, int bit)
{
struct udevice *bus = dev_get_parent(dev);
- struct soft_spi_platdata *plat = dev_get_platdata(bus);
+ struct soft_spi_platdata *plat = dev_get_plat(bus);
dm_gpio_set_value(&plat->mosi, bit);
{
struct udevice *bus = dev_get_parent(dev);
struct soft_spi_priv *priv = dev_get_priv(bus);
- struct soft_spi_platdata *plat = dev_get_platdata(bus);
+ struct soft_spi_platdata *plat = dev_get_plat(bus);
int cidle = !!(priv->mode & SPI_CPOL);
dm_gpio_set_value(&plat->cs, 0);
static int soft_spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev_get_parent(dev);
- struct soft_spi_platdata *plat = dev_get_platdata(bus);
+ struct soft_spi_platdata *plat = dev_get_plat(bus);
dm_gpio_set_value(&plat->cs, 0);
{
struct udevice *bus = dev_get_parent(dev);
struct soft_spi_priv *priv = dev_get_priv(bus);
- struct soft_spi_platdata *plat = dev_get_platdata(bus);
+ struct soft_spi_platdata *plat = dev_get_plat(bus);
uchar tmpdin = 0;
uchar tmpdout = 0;
const u8 *txd = dout;
static int sun4i_spi_set_speed(struct udevice *dev, uint speed)
{
- struct sun4i_spi_platdata *plat = dev_get_platdata(dev);
+ struct sun4i_spi_platdata *plat = dev_get_plat(dev);
struct sun4i_spi_priv *priv = dev_get_priv(dev);
unsigned int div;
u32 reg;
static int sun4i_spi_probe(struct udevice *bus)
{
- struct sun4i_spi_platdata *plat = dev_get_platdata(bus);
+ struct sun4i_spi_platdata *plat = dev_get_plat(bus);
struct sun4i_spi_priv *priv = dev_get_priv(bus);
int ret;
static int sun4i_spi_ofdata_to_platdata(struct udevice *bus)
{
- struct sun4i_spi_platdata *plat = dev_get_platdata(bus);
+ struct sun4i_spi_platdata *plat = dev_get_plat(bus);
int node = dev_of_offset(bus);
plat->base = dev_read_addr(bus);
static int tegra114_spi_probe(struct udevice *bus)
{
- struct tegra_spi_platdata *plat = dev_get_platdata(bus);
+ struct tegra_spi_platdata *plat = dev_get_plat(bus);
struct tegra114_spi_priv *priv = dev_get_priv(bus);
struct spi_regs *regs;
ulong rate;
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_platdata *pdata = dev_get_plat(bus);
struct tegra114_spi_priv *priv = dev_get_priv(bus);
/* If it's too soon to do another transaction, wait */
static void spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_platdata *pdata = dev_get_plat(bus);
struct tegra114_spi_priv *priv = dev_get_priv(bus);
setbits_le32(&priv->regs->command1, SPI_CMD1_CS_SW_VAL);
static int tegra20_sflash_probe(struct udevice *bus)
{
- struct tegra_spi_platdata *plat = dev_get_platdata(bus);
+ struct tegra_spi_platdata *plat = dev_get_plat(bus);
struct tegra20_sflash_priv *priv = dev_get_priv(bus);
priv->regs = (struct spi_regs *)plat->base;
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_platdata *pdata = dev_get_plat(bus);
struct tegra20_sflash_priv *priv = dev_get_priv(bus);
/* If it's too soon to do another transaction, wait */
static void spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_platdata *pdata = dev_get_plat(bus);
struct tegra20_sflash_priv *priv = dev_get_priv(bus);
/* CS is negated on Tegra, so drive a 0 to get a 1 */
static int tegra30_spi_probe(struct udevice *bus)
{
- struct tegra_spi_platdata *plat = dev_get_platdata(bus);
+ struct tegra_spi_platdata *plat = dev_get_plat(bus);
struct tegra30_spi_priv *priv = dev_get_priv(bus);
priv->regs = (struct spi_regs *)plat->base;
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_platdata *pdata = dev_get_plat(bus);
struct tegra30_spi_priv *priv = dev_get_priv(bus);
/* If it's too soon to do another transaction, wait */
static void spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_platdata *pdata = dev_get_plat(bus);
struct tegra30_spi_priv *priv = dev_get_priv(bus);
/* CS is negated on Tegra, so drive a 0 to get a 1 */
static int tegra210_qspi_probe(struct udevice *bus)
{
- struct tegra_spi_platdata *plat = dev_get_platdata(bus);
+ struct tegra_spi_platdata *plat = dev_get_plat(bus);
struct tegra210_qspi_priv *priv = dev_get_priv(bus);
priv->regs = (struct qspi_regs *)plat->base;
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_platdata *pdata = dev_get_plat(bus);
struct tegra210_qspi_priv *priv = dev_get_priv(bus);
/* If it's too soon to do another transaction, wait */
static void spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_platdata *pdata = dev_get_plat(bus);
struct tegra210_qspi_priv *priv = dev_get_priv(bus);
setbits_le32(&priv->regs->command1, QSPI_CMD1_CS_SW_VAL);
static int uniphier_spi_probe(struct udevice *bus)
{
- struct uniphier_spi_platdata *plat = dev_get_platdata(bus);
+ struct uniphier_spi_platdata *plat = dev_get_plat(bus);
struct uniphier_spi_priv *priv = dev_get_priv(bus);
priv->base = plat->base;
static int zynq_qspi_probe(struct udevice *bus)
{
- struct zynq_qspi_platdata *plat = dev_get_platdata(bus);
+ struct zynq_qspi_platdata *plat = dev_get_plat(bus);
struct zynq_qspi_priv *priv = dev_get_priv(bus);
struct clk clk;
unsigned long clock;
static int zynq_spi_probe(struct udevice *bus)
{
- struct zynq_spi_platdata *plat = dev_get_platdata(bus);
+ struct zynq_spi_platdata *plat = dev_get_plat(bus);
struct zynq_spi_priv *priv = dev_get_priv(bus);
struct clk clk;
unsigned long clock;
static int zynqmp_qspi_probe(struct udevice *bus)
{
- struct zynqmp_qspi_platdata *plat = dev_get_platdata(bus);
+ struct zynqmp_qspi_platdata *plat = dev_get_plat(bus);
struct zynqmp_qspi_priv *priv = dev_get_priv(bus);
struct clk clk;
unsigned long clock;
*/
int pch_sysreset_power_off(struct udevice *dev)
{
- struct x86_sysreset_platdata *plat = dev_get_platdata(dev);
+ struct x86_sysreset_platdata *plat = dev_get_plat(dev);
struct pch_pmbase_info pm;
u32 reg32;
int ret;
static int x86_sysreset_probe(struct udevice *dev)
{
- struct x86_sysreset_platdata *plat = dev_get_platdata(dev);
+ struct x86_sysreset_platdata *plat = dev_get_plat(dev);
/* Locate the PCH if there is one. It isn't essential */
uclass_first_device(UCLASS_PCH, &plat->pch);
static u32 do_call_with_arg(struct udevice *dev, struct optee_msg_arg *arg)
{
- struct optee_pdata *pdata = dev_get_platdata(dev);
+ struct optee_pdata *pdata = dev_get_plat(dev);
struct rpc_param param = { .a0 = OPTEE_SMC_CALL_WITH_ARG };
void *page_list = NULL;
static int optee_ofdata_to_platdata(struct udevice *dev)
{
- struct optee_pdata *pdata = dev_get_platdata(dev);
+ struct optee_pdata *pdata = dev_get_plat(dev);
pdata->invoke_fn = get_invoke_func(dev);
if (IS_ERR(pdata->invoke_fn))
static int optee_probe(struct udevice *dev)
{
- struct optee_pdata *pdata = dev_get_platdata(dev);
+ struct optee_pdata *pdata = dev_get_plat(dev);
u32 sec_caps;
if (!is_optee_api(pdata->invoke_fn)) {
sc_rsrc_t *sensor_rsrc = (sc_rsrc_t *)dev_get_driver_data(dev);
- struct imx_sc_thermal_plat *pdata = dev_get_platdata(dev);
+ struct imx_sc_thermal_plat *pdata = dev_get_plat(dev);
if (!temp)
return -EINVAL;
int imx_sc_thermal_get_temp(struct udevice *dev, int *temp)
{
- struct imx_sc_thermal_plat *pdata = dev_get_platdata(dev);
+ struct imx_sc_thermal_plat *pdata = dev_get_plat(dev);
int cpu_temp = 0;
int ret;
static int imx_sc_thermal_bind(struct udevice *dev)
{
- struct imx_sc_thermal_plat *pdata = dev_get_platdata(dev);
+ struct imx_sc_thermal_plat *pdata = dev_get_plat(dev);
int reg, ret;
int offset;
const char *name;
static int imx_sc_thermal_ofdata_to_platdata(struct udevice *dev)
{
- struct imx_sc_thermal_plat *pdata = dev_get_platdata(dev);
+ struct imx_sc_thermal_plat *pdata = dev_get_plat(dev);
struct fdtdec_phandle_args args;
const char *type;
int ret;
{
int temperature;
unsigned int reg, n_meas;
- const struct imx_thermal_plat *pdata = dev_get_platdata(dev);
+ const struct imx_thermal_plat *pdata = dev_get_plat(dev);
struct anatop_regs *anatop = (struct anatop_regs *)pdata->regs;
struct thermal_data *priv = dev_get_priv(dev);
u32 fuse = priv->fuse;
{
unsigned int fuse = ~0;
- const struct imx_thermal_plat *pdata = dev_get_platdata(dev);
+ const struct imx_thermal_plat *pdata = dev_get_plat(dev);
struct thermal_data *priv = dev_get_priv(dev);
/* Read Temperature calibration data fuse */
static int read_temperature(struct udevice *dev, int *temp)
{
- struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+ struct imx_tmu_plat *pdata = dev_get_plat(dev);
ulong drv_data = dev_get_driver_data(dev);
u32 val;
u32 retry = 10;
int imx_tmu_get_temp(struct udevice *dev, int *temp)
{
- struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+ struct imx_tmu_plat *pdata = dev_get_plat(dev);
int cpu_tmp = 0;
int ret;
int i, val, len, ret;
u32 range[4];
const fdt32_t *calibration;
- struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+ struct imx_tmu_plat *pdata = dev_get_plat(dev);
ulong drv_data = dev_get_driver_data(dev);
debug("%s\n", __func__);
static void imx_tmu_init(struct udevice *dev)
{
- struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+ struct imx_tmu_plat *pdata = dev_get_plat(dev);
ulong drv_data = dev_get_driver_data(dev);
debug("%s\n", __func__);
static int imx_tmu_enable_msite(struct udevice *dev)
{
- struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+ struct imx_tmu_plat *pdata = dev_get_plat(dev);
ulong drv_data = dev_get_driver_data(dev);
u32 reg;
static int imx_tmu_bind(struct udevice *dev)
{
- struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+ struct imx_tmu_plat *pdata = dev_get_plat(dev);
int ret;
ofnode node, offset;
const char *name;
static int imx_tmu_parse_fdt(struct udevice *dev)
{
- struct imx_tmu_plat *pdata = dev_get_platdata(dev), *p_parent_data;
+ struct imx_tmu_plat *pdata = dev_get_plat(dev), *p_parent_data;
struct ofnode_phandle_args args;
ofnode trips_np;
int ret;
return 0;
}
- p_parent_data = dev_get_platdata(dev->parent);
+ p_parent_data = dev_get_plat(dev->parent);
if (p_parent_data->zone_node)
pdata->regs = p_parent_data->regs;
static int imx_tmu_probe(struct udevice *dev)
{
- struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+ struct imx_tmu_plat *pdata = dev_get_plat(dev);
int ret;
ret = imx_tmu_parse_fdt(dev);
static int atftme_timer_ofdata_to_platdata(struct udevice *dev)
{
- struct atftmr_timer_platdata *plat = dev_get_platdata(dev);
+ struct atftmr_timer_platdata *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev),
sizeof(struct atftmr_timer_regs),
MAP_NOCACHE);
static int altera_timer_ofdata_to_platdata(struct udevice *dev)
{
- struct altera_timer_platdata *plat = dev_get_platdata(dev);
+ struct altera_timer_platdata *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev),
sizeof(struct altera_timer_regs),
static u64 atcpit_timer_get_count(struct udevice *dev)
{
- struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
+ struct atcpit_timer_platdata *plat = dev_get_plat(dev);
u32 val;
val = ~(REG32_TMR(CH_CNT(1))+0xffffffff);
return timer_conv_64(val);
static int atcpit_timer_probe(struct udevice *dev)
{
- struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
+ struct atcpit_timer_platdata *plat = dev_get_plat(dev);
REG32_TMR(CH_REL(1)) = 0xffffffff;
REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
static int atcpit_timer_ofdata_to_platdata(struct udevice *dev)
{
- struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
+ struct atcpit_timer_platdata *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev), 0x100 , MAP_NOCACHE);
return 0;
}
static u64 atmel_pit_get_count(struct udevice *dev)
{
- struct atmel_pit_platdata *plat = dev_get_platdata(dev);
+ struct atmel_pit_platdata *plat = dev_get_plat(dev);
struct atmel_pit_regs *const regs = plat->regs;
u32 val = readl(®s->value_image);
static int atmel_pit_probe(struct udevice *dev)
{
- struct atmel_pit_platdata *plat = dev_get_platdata(dev);
+ struct atmel_pit_platdata *plat = dev_get_plat(dev);
struct atmel_pit_regs *const regs = plat->regs;
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct clk clk;
static int atmel_pit_ofdata_to_platdata(struct udevice *dev)
{
- struct atmel_pit_platdata *plat = dev_get_platdata(dev);
+ struct atmel_pit_platdata *plat = dev_get_plat(dev);
plat->regs = dev_read_addr_ptr(dev);
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct rockchip_timer_priv *priv = dev_get_priv(dev);
- struct rockchip_timer_plat *plat = dev_get_platdata(dev);
+ struct rockchip_timer_plat *plat = dev_get_plat(dev);
priv->timer = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
uc_priv->clock_rate = plat->dtd.clock_frequency;
{
int total_length = 0, ret;
struct spi_slave *slave = dev_get_parent_priv(dev);
- struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
+ struct st33zp24_spi_phy *phy = dev_get_plat(dev);
u8 *tx_buf = (u8 *)phy->tx_buf;
u8 *rx_buf = phy->rx_buf;
{
int total_length = 0, ret;
struct spi_slave *slave = dev_get_parent_priv(dev);
- struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
+ struct st33zp24_spi_phy *phy = dev_get_plat(dev);
u8 *tx_buf = (u8 *)phy->tx_buf;
u8 *rx_buf = phy->rx_buf;
{
int latency = 1, status = 0;
u8 data = 0;
- struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
+ struct st33zp24_spi_phy *phy = dev_get_plat(dev);
while (!status && latency < MAX_SPI_LATENCY) {
phy->latency = latency;
static int st33zp24_spi_init(struct udevice *dev)
{
struct tpm_chip *chip = dev_get_priv(dev);
- struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
+ struct st33zp24_spi_phy *phy = dev_get_plat(dev);
chip->is_open = 1;
static int cdns_ti_probe(struct udevice *dev)
{
- struct cdns_ti *data = dev_get_platdata(dev);
+ struct cdns_ti *data = dev_get_plat(dev);
struct clk usb2_refclk;
int modestrap_mode;
unsigned long rate;
static int cdns_ti_remove(struct udevice *dev)
{
- struct cdns_ti *data = dev_get_platdata(dev);
+ struct cdns_ti *data = dev_get_plat(dev);
u32 reg;
/* put device back to RESET*/
struct dwc3_generic_priv *priv)
{
int rc;
- struct dwc3_generic_plat *plat = dev_get_platdata(dev);
+ struct dwc3_generic_plat *plat = dev_get_plat(dev);
struct dwc3 *dwc3 = &priv->dwc3;
- struct dwc3_glue_data *glue = dev_get_platdata(dev->parent);
+ struct dwc3_glue_data *glue = dev_get_plat(dev->parent);
dwc3->dev = dev;
dwc3->maximum_speed = plat->maximum_speed;
static int dwc3_generic_ofdata_to_platdata(struct udevice *dev)
{
- struct dwc3_generic_plat *plat = dev_get_platdata(dev);
+ struct dwc3_generic_plat *plat = dev_get_plat(dev);
ofnode node = dev->node;
plat->base = dev_read_addr(dev);
u32 utmi_mode;
u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS;
- struct dwc3_glue_data *glue = dev_get_platdata(dev);
+ struct dwc3_glue_data *glue = dev_get_plat(dev);
void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE);
if (device_is_compatible(dev, "ti,am437x-dwc3"))
static int dwc3_glue_probe(struct udevice *dev)
{
struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev);
- struct dwc3_glue_data *glue = dev_get_platdata(dev);
+ struct dwc3_glue_data *glue = dev_get_plat(dev);
struct udevice *child = NULL;
int index = 0;
int ret;
static int dwc3_glue_remove(struct udevice *dev)
{
- struct dwc3_glue_data *glue = dev_get_platdata(dev);
+ struct dwc3_glue_data *glue = dev_get_plat(dev);
reset_release_bulk(&glue->resets);
int dwc3_meson_g12a_force_mode(struct udevice *dev, enum usb_dr_mode mode)
{
- struct dwc3_meson_g12a *priv = dev_get_platdata(dev);
+ struct dwc3_meson_g12a *priv = dev_get_plat(dev);
if (!priv)
return -EINVAL;
static int dwc3_meson_g12a_probe(struct udevice *dev)
{
- struct dwc3_meson_g12a *priv = dev_get_platdata(dev);
+ struct dwc3_meson_g12a *priv = dev_get_plat(dev);
int ret, i;
priv->dev = dev;
static int dwc3_meson_g12a_remove(struct udevice *dev)
{
- struct dwc3_meson_g12a *priv = dev_get_platdata(dev);
+ struct dwc3_meson_g12a *priv = dev_get_plat(dev);
int i;
reset_release_all(&priv->reset, 1);
int dwc3_meson_gxl_force_mode(struct udevice *dev, enum usb_dr_mode mode)
{
- struct dwc3_meson_gxl *priv = dev_get_platdata(dev);
+ struct dwc3_meson_gxl *priv = dev_get_plat(dev);
if (!priv)
return -EINVAL;
static int dwc3_meson_gxl_probe(struct udevice *dev)
{
- struct dwc3_meson_gxl *priv = dev_get_platdata(dev);
+ struct dwc3_meson_gxl *priv = dev_get_plat(dev);
int ret, i;
priv->dev = dev;
static int dwc3_meson_gxl_remove(struct udevice *dev)
{
- struct dwc3_meson_gxl *priv = dev_get_platdata(dev);
+ struct dwc3_meson_gxl *priv = dev_get_plat(dev);
int i;
reset_release_all(&priv->reset, 1);
static int sandbox_flash_bulk(struct udevice *dev, struct usb_device *udev,
unsigned long pipe, void *buff, int len)
{
- struct sandbox_flash_plat *plat = dev_get_platdata(dev);
+ struct sandbox_flash_plat *plat = dev_get_plat(dev);
struct sandbox_flash_priv *priv = dev_get_priv(dev);
int ep = usb_pipeendpoint(pipe);
struct umass_bbb_cbw *cbw = buff;
static int sandbox_flash_ofdata_to_platdata(struct udevice *dev)
{
- struct sandbox_flash_plat *plat = dev_get_platdata(dev);
+ struct sandbox_flash_plat *plat = dev_get_plat(dev);
plat->pathname = dev_read_string(dev, "sandbox,filepath");
static int sandbox_flash_bind(struct udevice *dev)
{
- struct sandbox_flash_plat *plat = dev_get_platdata(dev);
+ struct sandbox_flash_plat *plat = dev_get_plat(dev);
struct usb_string *fs;
fs = plat->flash_strings;
static int sandbox_flash_probe(struct udevice *dev)
{
- struct sandbox_flash_plat *plat = dev_get_platdata(dev);
+ struct sandbox_flash_plat *plat = dev_get_plat(dev);
struct sandbox_flash_priv *priv = dev_get_priv(dev);
priv->fd = os_open(plat->pathname, OS_O_RDONLY);
static int sandbox_keyb_bind(struct udevice *dev)
{
- struct sandbox_keyb_plat *plat = dev_get_platdata(dev);
+ struct sandbox_keyb_plat *plat = dev_get_plat(dev);
struct usb_string *fs;
fs = plat->keyb_strings;
#ifdef CONFIG_DM_ETH
static int asix_eth_start(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct asix_private *priv = dev_get_priv(dev);
return asix_init_common(&priv->ueth, pdata->enetaddr);
int asix_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct asix_private *priv = dev_get_priv(dev);
if (priv->flags & FLAG_TYPE_AX88172)
static int asix_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct asix_private *priv = dev_get_priv(dev);
struct ueth_data *ss = &priv->ueth;
int ret;
int ax88179_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct asix_private *priv = dev_get_priv(dev);
struct ueth_data *ueth = &priv->ueth;
static int ax88179_eth_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct asix_private *priv = dev_get_priv(dev);
struct usb_device *usb_dev;
int ret;
int lan75xx_write_hwaddr(struct udevice *dev)
{
struct usb_device *udev = dev_get_parent_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
unsigned char *enetaddr = pdata->enetaddr;
u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]);
int lan75xx_read_rom_hwaddr(struct udevice *dev)
{
struct usb_device *udev = dev_get_parent_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int ret;
/*
struct usb_device *udev = dev_get_parent_priv(dev);
struct lan7x_private *priv = dev_get_priv(dev);
struct ueth_data *ueth = &priv->ueth;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int ret;
/* Do a reset in order to get the MAC address from HW */
int lan78xx_write_hwaddr(struct udevice *dev)
{
struct usb_device *udev = dev_get_parent_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
unsigned char *enetaddr = pdata->enetaddr;
u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]);
int lan78xx_read_rom_hwaddr(struct udevice *dev)
{
struct usb_device *udev = dev_get_parent_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct lan7x_private *priv = dev_get_priv(dev);
int ret;
struct usb_device *udev = dev_get_parent_priv(dev);
struct lan7x_private *priv = dev_get_priv(dev);
struct ueth_data *ueth = &priv->ueth;
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int ret;
/* Do a reset in order to get the MAC address from HW */
int mcs7830_write_hwaddr(struct udevice *dev)
{
struct usb_device *udev = dev_get_parent_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
return mcs7830_write_mac_common(udev, pdata->enetaddr);
}
{
struct usb_device *udev = dev_get_parent_priv(dev);
struct mcs7830_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ueth_data *ueth = &priv->ueth;
if (mcs7830_basic_reset(udev, priv))
static int r8152_write_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct r8152 *tp = dev_get_priv(dev);
unsigned char enetaddr[8] = { 0 };
int r8152_read_rom_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct r8152 *tp = dev_get_priv(dev);
debug("** %s (%d)\n", __func__, __LINE__);
static int r8152_eth_probe(struct udevice *dev)
{
struct usb_device *udev = dev_get_parent_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct r8152 *tp = dev_get_priv(dev);
struct ueth_data *ueth = &tp->ueth;
int ret;
{
struct usb_device *udev = dev_get_parent_priv(dev);
struct smsc95xx_private *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
/* Driver-model Ethernet ensures we have this */
priv->have_hwaddr = 1;
int smsc95xx_write_hwaddr(struct udevice *dev)
{
struct usb_device *udev = dev_get_parent_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct smsc95xx_private *priv = dev_get_priv(dev);
return smsc95xx_write_hwaddr_common(udev, priv, pdata->enetaddr);
int smsc95xx_read_rom_hwaddr(struct udevice *dev)
{
struct usb_device *udev = dev_get_parent_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int ret;
ret = smsc95xx_init_mac_address(pdata->enetaddr, udev);
static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
{
- struct dwc2_plat_otg_data *plat = dev_get_platdata(dev);
+ struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
ulong drvdata;
void (*set_params)(struct dwc2_plat_otg_data *data);
int ret;
static int dwc2_udc_otg_probe(struct udevice *dev)
{
- struct dwc2_plat_otg_data *plat = dev_get_platdata(dev);
+ struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
struct dwc2_priv_data *priv = dev_get_priv(dev);
struct dwc2_usbotg_reg *usbotg_reg =
(struct dwc2_usbotg_reg *)plat->regs_otg;
int dwc2_udc_B_session_valid(struct udevice *dev)
{
- struct dwc2_plat_otg_data *plat = dev_get_platdata(dev);
+ struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
struct dwc2_usbotg_reg *usbotg_reg =
(struct dwc2_usbotg_reg *)plat->regs_otg;
int gcnum;
u8 tmp[7];
#ifdef CONFIG_DM_ETH
- struct eth_pdata *pdata = dev_get_platdata(l_priv->netdev);
+ struct eth_pdata *pdata = dev_get_plat(l_priv->netdev);
#endif
/* these flags are only ever cleared; compiler take note */
static int usb_eth_probe(struct udevice *dev)
{
struct ether_priv *priv = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
priv->netdev = dev;
l_priv = priv;
static int dwc3_of_simple_probe(struct udevice *dev)
{
- struct dwc3_of_simple *simple = dev_get_platdata(dev);
+ struct dwc3_of_simple *simple = dev_get_plat(dev);
int ret;
ret = dwc3_of_simple_clk_init(dev, simple);
static int dwc3_of_simple_remove(struct udevice *dev)
{
- struct dwc3_of_simple *simple = dev_get_platdata(dev);
+ struct dwc3_of_simple *simple = dev_get_plat(dev);
reset_release_bulk(&simple->resets);
static int sti_dwc3_glue_ofdata_to_platdata(struct udevice *dev)
{
- struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
+ struct sti_dwc3_glue_platdata *plat = dev_get_plat(dev);
struct udevice *syscon;
struct regmap *regmap;
int ret;
static int sti_dwc3_glue_bind(struct udevice *dev)
{
- struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
+ struct sti_dwc3_glue_platdata *plat = dev_get_plat(dev);
ofnode node, dwc3_node;
/* Find snps,dwc3 node from subnode */
static int sti_dwc3_glue_probe(struct udevice *dev)
{
- struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
+ struct sti_dwc3_glue_platdata *plat = dev_get_plat(dev);
int ret;
/* deassert both powerdown and softreset */
static int sti_dwc3_glue_remove(struct udevice *dev)
{
- struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
+ struct sti_dwc3_glue_platdata *plat = dev_get_plat(dev);
int ret;
/* assert both powerdown and softreset */
static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
{
- struct exynos_ehci_platdata *plat = dev_get_platdata(dev);
+ struct exynos_ehci_platdata *plat = dev_get_plat(dev);
const void *blob = gd->fdt_blob;
unsigned int node;
int depth;
static int ehci_usb_probe(struct udevice *dev)
{
- struct exynos_ehci_platdata *plat = dev_get_platdata(dev);
+ struct exynos_ehci_platdata *plat = dev_get_plat(dev);
struct exynos_ehci *ctx = dev_get_priv(dev);
struct ehci_hcor *hcor;
{
struct msm_ehci_priv *p = dev_get_priv(dev);
struct usb_ehci *ehci = p->ehci;
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
int ret;
static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
const char *mode;
mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "dr_mode", NULL);
static int ehci_usb_probe(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
struct usb_ehci *ehci = dev_read_addr_ptr(dev);
struct ehci_mx5_priv_data *priv = dev_get_priv(dev);
enum usb_init_type type = plat->init_type;
static int ehci_usb_phy_mode(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
void *__iomem addr = dev_read_addr_ptr(dev);
void *__iomem phy_ctrl, *__iomem phy_status;
const void *blob = gd->fdt_blob;
static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
enum usb_dr_mode dr_mode;
dr_mode = usb_get_dr_mode(dev->node);
static int ehci_usb_probe(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
struct usb_ehci *ehci = dev_read_addr_ptr(dev);
struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
enum usb_init_type type = plat->init_type;
static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
plat->init_type = USB_INIT_HOST;
static int omap_ehci_probe(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
struct ehci_omap_priv_data *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
static int ehci_usb_probe(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
struct fdt_usb *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
static int ehci_usb_probe(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
struct ehci_vf_priv_data *priv = dev_get_priv(dev);
struct usb_ehci *ehci = priv->ehci;
struct ehci_hccr *hccr;
static int ehci_zynq_probe(struct udevice *dev)
{
- struct usb_platdata *plat = dev_get_platdata(dev);
+ struct usb_platdata *plat = dev_get_plat(dev);
struct zynq_ehci_priv *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
if (ret)
return ret;
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
plat->init_type = USB_INIT_DEVICE;
ret = device_probe(dev);
if (ret)
static int xhci_brcm_probe(struct udevice *dev)
{
- struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
+ struct brcm_xhci_platdata *plat = dev_get_plat(dev);
struct xhci_hcor *hcor;
struct xhci_hccr *hcd;
int len, ret = 0;
static int xhci_brcm_deregister(struct udevice *dev)
{
- struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
+ struct brcm_xhci_platdata *plat = dev_get_plat(dev);
/* Restore the default values for AXI read and write attributes */
writel(plat->awcache, plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA);
struct xhci_hccr *hccr;
struct dwc3 *dwc3_reg;
enum usb_dr_mode dr_mode;
- struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+ struct xhci_dwc3_platdata *plat = dev_get_plat(dev);
const char *phy;
u32 reg;
int ret;
static int xhci_dwc3_remove(struct udevice *dev)
{
- struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+ struct xhci_dwc3_platdata *plat = dev_get_plat(dev);
dwc3_shutdown_phy(dev, &plat->phys);
static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
{
- struct exynos_xhci_platdata *plat = dev_get_platdata(dev);
+ struct exynos_xhci_platdata *plat = dev_get_plat(dev);
const void *blob = gd->fdt_blob;
unsigned int node;
int depth;
static int xhci_usb_probe(struct udevice *dev)
{
- struct exynos_xhci_platdata *plat = dev_get_platdata(dev);
+ struct exynos_xhci_platdata *plat = dev_get_plat(dev);
struct exynos_xhci *ctx = dev_get_priv(dev);
struct xhci_hcor *hcor;
int ret;
static int xhci_usb_probe(struct udevice *dev)
{
- struct mvebu_xhci_platdata *plat = dev_get_platdata(dev);
+ struct mvebu_xhci_platdata *plat = dev_get_plat(dev);
struct mvebu_xhci *ctx = dev_get_priv(dev);
struct xhci_hcor *hcor;
int len, ret;
static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
{
- struct mvebu_xhci_platdata *plat = dev_get_platdata(dev);
+ struct mvebu_xhci_platdata *plat = dev_get_plat(dev);
/*
* Get the base address for XHCI controller from the device node
static int xhci_rcar_probe(struct udevice *dev)
{
- struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
+ struct rcar_xhci_platdata *plat = dev_get_plat(dev);
struct rcar_xhci *ctx = dev_get_priv(dev);
struct xhci_hcor *hcor;
int len, ret;
static int xhci_rcar_deregister(struct udevice *dev)
{
int ret;
- struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
+ struct rcar_xhci_platdata *plat = dev_get_plat(dev);
ret = xhci_deregister(dev);
static int xhci_rcar_ofdata_to_platdata(struct udevice *dev)
{
- struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
+ struct rcar_xhci_platdata *plat = dev_get_plat(dev);
plat->hcd_base = dev_read_addr(dev);
if (plat->hcd_base == FDT_ADDR_T_NONE) {
static int da8xx_musb_ofdata_to_platdata(struct udevice *dev)
{
- struct da8xx_musb_platdata *plat = dev_get_platdata(dev);
+ struct da8xx_musb_platdata *plat = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
static int da8xx_musb_probe(struct udevice *dev)
{
struct musb_host_data *host = dev_get_priv(dev);
- struct da8xx_musb_platdata *plat = dev_get_platdata(dev);
+ struct da8xx_musb_platdata *plat = dev_get_plat(dev);
struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
struct omap_musb_board_data *otg_board_data;
int ret;
static int omap2430_musb_ofdata_to_platdata(struct udevice *dev)
{
- struct omap2430_musb_platdata *plat = dev_get_platdata(dev);
+ struct omap2430_musb_platdata *plat = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
#else
struct musb *musbp;
#endif
- struct omap2430_musb_platdata *plat = dev_get_platdata(dev);
+ struct omap2430_musb_platdata *plat = dev_get_plat(dev);
struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
struct omap_musb_board_data *otg_board_data;
int ret = 0;
static void ti_musb_set_phy_power(struct udevice *dev, u8 on)
{
- struct ti_musb_platdata *plat = dev_get_platdata(dev);
+ struct ti_musb_platdata *plat = dev_get_plat(dev);
if (!plat->ctrl_mod_base)
return;
static int ti_musb_ofdata_to_platdata(struct udevice *dev)
{
- struct ti_musb_platdata *plat = dev_get_platdata(dev);
+ struct ti_musb_platdata *plat = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
int phys;
static int ti_musb_host_probe(struct udevice *dev)
{
struct musb_host_data *host = dev_get_priv(dev);
- struct ti_musb_platdata *plat = dev_get_platdata(dev);
+ struct ti_musb_platdata *plat = dev_get_plat(dev);
struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
int ret;
#if CONFIG_IS_ENABLED(OF_CONTROL)
static int ti_musb_host_ofdata_to_platdata(struct udevice *dev)
{
- struct ti_musb_platdata *plat = dev_get_platdata(dev);
+ struct ti_musb_platdata *plat = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
int ret;
#if CONFIG_IS_ENABLED(OF_CONTROL)
static int ti_musb_peripheral_ofdata_to_platdata(struct udevice *dev)
{
- struct ti_musb_platdata *plat = dev_get_platdata(dev);
+ struct ti_musb_platdata *plat = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
int ret;
static int ti_musb_peripheral_probe(struct udevice *dev)
{
struct ti_musb_peripheral *priv = dev_get_priv(dev);
- struct ti_musb_platdata *plat = dev_get_platdata(dev);
+ struct ti_musb_platdata *plat = dev_get_plat(dev);
int ret;
priv->periph = musb_init_controller(&plat->plat,
static int atmel_fb_ofdata_to_platdata(struct udevice *dev)
{
- struct atmel_lcd_platdata *plat = dev_get_platdata(dev);
+ struct atmel_lcd_platdata *plat = dev_get_plat(dev);
struct atmel_fb_priv *priv = dev_get_priv(dev);
struct display_timing *timing = &priv->timing;
const void *blob = gd->fdt_blob;
static void igd_setup_panel(struct udevice *dev)
{
- struct broadwell_igd_plat *plat = dev_get_platdata(dev);
+ struct broadwell_igd_plat *plat = dev_get_plat(dev);
struct broadwell_igd_priv *priv = dev_get_priv(dev);
u32 reg32;
static int igd_cdclk_init_haswell(struct udevice *dev)
{
- struct broadwell_igd_plat *plat = dev_get_platdata(dev);
+ struct broadwell_igd_plat *plat = dev_get_plat(dev);
struct broadwell_igd_priv *priv = dev_get_priv(dev);
int cdclk = plat->cdclk;
u16 devid;
static int igd_cdclk_init_broadwell(struct udevice *dev)
{
- struct broadwell_igd_plat *plat = dev_get_platdata(dev);
+ struct broadwell_igd_plat *plat = dev_get_plat(dev);
struct broadwell_igd_priv *priv = dev_get_priv(dev);
int cdclk = plat->cdclk;
u32 dpdiv, lpcll, pwctl, cdset;
static int igd_pre_init(struct udevice *dev, bool is_broadwell)
{
- struct broadwell_igd_plat *plat = dev_get_platdata(dev);
+ struct broadwell_igd_plat *plat = dev_get_plat(dev);
struct broadwell_igd_priv *priv = dev_get_priv(dev);
u32 rp1_gfx_freq;
int ret;
static int broadwell_igd_ofdata_to_platdata(struct udevice *dev)
{
- struct broadwell_igd_plat *plat = dev_get_platdata(dev);
+ struct broadwell_igd_plat *plat = dev_get_plat(dev);
struct broadwell_igd_priv *priv = dev_get_priv(dev);
int node = dev_of_offset(dev);
const void *blob = gd->fdt_blob;
{
struct video_uc_platdata *uc_plat = dev_get_uclass_plat(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
- struct nx_display_platdata *plat = dev_get_platdata(dev);
+ struct nx_display_platdata *plat = dev_get_plat(dev);
static GraphicDevice *graphic_device;
char addr[64];
static void otm8009a_dcs_write_buf(struct udevice *dev, const void *data,
size_t len)
{
- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *device = plat->device;
if (mipi_dsi_dcs_write_buffer(device, data, len) < 0)
static void otm8009a_dcs_write_buf_hs(struct udevice *dev, const void *data,
size_t len)
{
- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *device = plat->device;
/* data will be sent in dsi hs mode (ie. no lpm) */
static int otm8009a_init_sequence(struct udevice *dev)
{
- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *device = plat->device;
int ret;
static int otm8009a_panel_enable_backlight(struct udevice *dev)
{
- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *device = plat->device;
int ret;
static int otm8009a_panel_probe(struct udevice *dev)
{
struct otm8009a_panel_priv *priv = dev_get_priv(dev);
- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
int ret;
if (IS_ENABLED(CONFIG_DM_REGULATOR) && priv->reg) {
static void rm68200_dcs_write_buf(struct udevice *dev, const void *data,
size_t len)
{
- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *device = plat->device;
int err;
static void rm68200_dcs_write_cmd(struct udevice *dev, u8 cmd, u8 value)
{
- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *device = plat->device;
int err;
static int rm68200_panel_enable_backlight(struct udevice *dev)
{
- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *device = plat->device;
struct rm68200_panel_priv *priv = dev_get_priv(dev);
int ret;
static int rm68200_panel_probe(struct udevice *dev)
{
struct rm68200_panel_priv *priv = dev_get_priv(dev);
- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
int ret;
if (IS_ENABLED(CONFIG_DM_REGULATOR) && priv->reg) {
static int sandbox_sdl_probe(struct udevice *dev)
{
struct video_uc_platdata *uc_plat = dev_get_uclass_plat(dev);
- struct sandbox_sdl_plat *plat = dev_get_platdata(dev);
+ struct sandbox_sdl_plat *plat = dev_get_plat(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct sandbox_state *state = state_get_current();
int ret;
static int sandbox_sdl_bind(struct udevice *dev)
{
struct video_uc_platdata *uc_plat = dev_get_uclass_plat(dev);
- struct sandbox_sdl_plat *plat = dev_get_platdata(dev);
+ struct sandbox_sdl_plat *plat = dev_get_plat(dev);
int ret = 0;
plat->xres = dev_read_u32_default(dev, "xres", LCD_MAX_WIDTH);
return ret;
}
- mplat = dev_get_platdata(priv->panel);
+ mplat = dev_get_plat(priv->panel);
mplat->device = &priv->device;
device->lanes = mplat->lanes;
device->format = mplat->format;
static int tegra_dp_ofdata_to_platdata(struct udevice *dev)
{
- struct tegra_dp_plat *plat = dev_get_platdata(dev);
+ struct tegra_dp_plat *plat = dev_get_plat(dev);
plat->base = dev_read_addr(dev);
static int dp_tegra_probe(struct udevice *dev)
{
- struct tegra_dp_plat *plat = dev_get_platdata(dev);
+ struct tegra_dp_plat *plat = dev_get_plat(dev);
struct tegra_dp_priv *priv = dev_get_priv(dev);
struct display_plat *disp_uc_plat = dev_get_uclass_plat(dev);
static int virtio_net_write_hwaddr(struct udevice *dev)
{
struct virtio_dev_priv *uc_priv = dev_get_uclass_priv(dev->parent);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int i;
/*
static int virtio_net_read_rom_hwaddr(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
if (!pdata)
return -ENOSYS;
static u8 mxc_w1_read_byte(struct udevice *dev)
{
- struct mxc_w1_pdata *pdata = dev_get_platdata(dev);
+ struct mxc_w1_pdata *pdata = dev_get_plat(dev);
struct mxc_w1_regs *regs = pdata->regs;
u16 status;
static void mxc_w1_write_byte(struct udevice *dev, u8 byte)
{
- struct mxc_w1_pdata *pdata = dev_get_platdata(dev);
+ struct mxc_w1_pdata *pdata = dev_get_plat(dev);
struct mxc_w1_regs *regs = pdata->regs;
u16 status;
static bool mxc_w1_reset(struct udevice *dev)
{
- struct mxc_w1_pdata *pdata = dev_get_platdata(dev);
+ struct mxc_w1_pdata *pdata = dev_get_plat(dev);
u16 reg_val;
writew(MXC_W1_CONTROL_RPP, &pdata->regs->control);
static u8 mxc_w1_triplet(struct udevice *dev, bool bdir)
{
- struct mxc_w1_pdata *pdata = dev_get_platdata(dev);
+ struct mxc_w1_pdata *pdata = dev_get_plat(dev);
u8 id_bit = mxc_w1_touch_bit(pdata, 1);
u8 comp_bit = mxc_w1_touch_bit(pdata, 1);
u8 retval;
static int mxc_w1_ofdata_to_platdata(struct udevice *dev)
{
- struct mxc_w1_pdata *pdata = dev_get_platdata(dev);
+ struct mxc_w1_pdata *pdata = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);
static int mxc_w1_probe(struct udevice *dev)
{
- struct mxc_w1_pdata *pdata = dev_get_platdata(dev);
+ struct mxc_w1_pdata *pdata = dev_get_plat(dev);
unsigned int clkrate = mxc_get_clock(MXC_IPG_PERCLK);
unsigned int clkdiv;
static bool w1_gpio_read_bit(struct udevice *dev)
{
- struct w1_gpio_pdata *pdata = dev_get_platdata(dev);
+ struct w1_gpio_pdata *pdata = dev_get_plat(dev);
int val;
dm_gpio_set_dir_flags(&pdata->gpio, GPIOD_IS_OUT);
static void w1_gpio_write_bit(struct udevice *dev, bool bit)
{
- struct w1_gpio_pdata *pdata = dev_get_platdata(dev);
+ struct w1_gpio_pdata *pdata = dev_get_plat(dev);
dm_gpio_set_dir_flags(&pdata->gpio, GPIOD_IS_OUT);
static bool w1_gpio_reset(struct udevice *dev)
{
- struct w1_gpio_pdata *pdata = dev_get_platdata(dev);
+ struct w1_gpio_pdata *pdata = dev_get_plat(dev);
int val;
/* initiate the reset pulse. first we must pull the bus to low */
static int w1_gpio_ofdata_to_platdata(struct udevice *dev)
{
- struct w1_gpio_pdata *pdata = dev_get_platdata(dev);
+ struct w1_gpio_pdata *pdata = dev_get_plat(dev);
int ret;
ret = gpio_request_by_name(dev, "gpios", 0, &pdata->gpio, 0);
static int xlnx_wdt_reset(struct udevice *dev)
{
u32 reg;
- struct xlnx_wdt_platdata *plat = dev_get_platdata(dev);
+ struct xlnx_wdt_platdata *plat = dev_get_plat(dev);
debug("%s ", __func__);
static int xlnx_wdt_stop(struct udevice *dev)
{
u32 reg;
- struct xlnx_wdt_platdata *plat = dev_get_platdata(dev);
+ struct xlnx_wdt_platdata *plat = dev_get_plat(dev);
if (plat->enable_once) {
debug("Can't stop Xilinx watchdog.\n");
static int xlnx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
{
- struct xlnx_wdt_platdata *plat = dev_get_platdata(dev);
+ struct xlnx_wdt_platdata *plat = dev_get_plat(dev);
debug("%s:\n", __func__);
static int xlnx_wdt_ofdata_to_platdata(struct udevice *dev)
{
- struct xlnx_wdt_platdata *plat = dev_get_platdata(dev);
+ struct xlnx_wdt_platdata *plat = dev_get_plat(dev);
plat->regs = (struct watchdog_regs *)dev_read_addr(dev);
if (IS_ERR(plat->regs))
static int xlnx_wwdt_probe(struct udevice *dev)
{
int ret;
- struct xlnx_wwdt_platdata *plat = dev_get_platdata(dev);
+ struct xlnx_wwdt_platdata *plat = dev_get_plat(dev);
struct xlnx_wwdt_priv *wdt = dev_get_priv(dev);
dev_dbg(dev, "%s: Probing wdt%u\n", __func__, dev->seq);
static int xlnx_wwdt_ofdata_to_platdata(struct udevice *dev)
{
- struct xlnx_wwdt_platdata *plat = dev_get_platdata(dev);
+ struct xlnx_wwdt_platdata *plat = dev_get_plat(dev);
plat->enable_once = dev_read_u32_default(dev, "xlnx,wdt-enable-once",
0);
static int pvblock_blk_probe(struct udevice *udev)
{
struct blkfront_dev *blk_dev = dev_get_priv(udev);
- struct blkfront_platdata *plat = dev_get_platdata(udev);
+ struct blkfront_platdata *plat = dev_get_plat(udev);
struct blk_desc *desc = dev_get_uclass_plat(udev);
int ret, devid;
#define U_BOOT_DRIVER_ALIAS(__name, __alias)
/**
- * dev_get_platdata() - Get the platform data for a device
+ * dev_get_plat() - Get the platform data for a device
*
* This checks that dev is not NULL, but no other checks for now
*
* @dev Device to check
* @return platform data, or NULL if none
*/
-void *dev_get_platdata(const struct udevice *dev);
+void *dev_get_plat(const struct udevice *dev);
/**
* dev_get_parent_plat() - Get the parent platform data for a device
* .plat_auto = sizeof(struct rockchip_mmc_plat),
*
* To access platform data:
- * struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
+ * struct rockchip_mmc_plat *plat = dev_get_plat(dev);
*
* See rockchip_dw_mmc.c for an example.
*
unsigned long fixed_rate;
};
-#define to_clk_fixed_rate(dev) ((struct clk_fixed_rate *)dev_get_platdata(dev))
+#define to_clk_fixed_rate(dev) ((struct clk_fixed_rate *)dev_get_plat(dev))
struct clk_composite {
struct clk clk;
* .plat_auto = sizeof(struct msm_sdhc_plat),
*
* To access platform data:
- * struct msm_sdhc_plat *plat = dev_get_platdata(dev);
+ * struct msm_sdhc_plat *plat = dev_get_plat(dev);
*
* See msm_sdhci.c for an example.
*
/**
* struct usb_platdata - Platform data about a USB controller
*
- * Given a USB controller (UCLASS_USB) dev this is dev_get_platdata(dev)
+ * Given a USB controller (UCLASS_USB) dev this is dev_get_plat(dev)
*/
struct usb_platdata {
enum usb_init_type init_type;
static ulong efi_bl_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
void *buffer)
{
- struct efi_blk_platdata *plat = dev_get_platdata(dev);
+ struct efi_blk_platdata *plat = dev_get_plat(dev);
struct efi_block_io *io = plat->io;
efi_status_t ret;
static ulong efi_bl_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
const void *buffer)
{
- struct efi_blk_platdata *plat = dev_get_platdata(dev);
+ struct efi_blk_platdata *plat = dev_get_plat(dev);
struct efi_block_io *io = plat->io;
efi_status_t ret;
/* Set the DM_FLAG_NAME_ALLOCED flag to avoid a memory leak */
device_set_name_alloced(bdev);
- plat = dev_get_platdata(bdev);
+ plat = dev_get_plat(bdev);
plat->handle = handle;
plat->io = interface;
static int testacpi_get_name(const struct udevice *dev, char *out_name)
{
- struct testacpi_platdata *plat = dev_get_platdata(dev);
+ struct testacpi_platdata *plat = dev_get_plat(dev);
if (plat->return_error)
return -EINVAL;
buf);
/* Test handling of a device which doesn't produce a name */
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
plat->no_name = true;
ut_assertok(acpi_device_path(child, buf, sizeof(buf)));
ut_asserteq_str("\\_SB." ACPI_TEST_CHILD_NAME, buf);
/* Test handling of a device which returns an error */
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
plat->return_error = true;
ut_asserteq(-EINVAL, acpi_device_path(child, buf, sizeof(buf)));
ut_asserteq_str("sandbox_clk_test", dev->name);
ut_assertok(uclass_next_device_err(&dev));
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
ut_assert(plat->boolval);
ut_asserteq(1, plat->intval);
ut_asserteq(4, ARRAY_SIZE(plat->intarray));
ut_asserteq_str("", plat->stringarray[2]);
ut_assertok(uclass_next_device_err(&dev));
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
ut_assert(!plat->boolval);
ut_asserteq(3, plat->intval);
ut_asserteq(5, plat->intarray[0]);
ut_asserteq_str("message", plat->stringarray[2]);
ut_assertok(uclass_next_device_err(&dev));
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
ut_assert(!plat->boolval);
ut_asserteq_str("one", plat->stringarray[0]);
ut_asserteq_str("", plat->stringarray[1]);
ut_asserteq_str("", plat->stringarray[2]);
ut_assertok(uclass_next_device_err(&dev));
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
ut_assert(!plat->boolval);
ut_asserteq_str("spl", plat->stringarray[0]);
ut_assertok(uclass_first_device_err(UCLASS_MISC, &dev));
ut_asserteq_str("sandbox_clk_test", dev->name);
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
ut_assertok(device_get_by_driver_info_idx(plat->clocks[0].idx, &clk));
ut_asserteq_str("fixed_clock", clk->name);
static int testdrv_ping(struct udevice *dev, int pingval, int *pingret)
{
- const struct dm_test_pdata *pdata = dev_get_platdata(dev);
+ const struct dm_test_pdata *pdata = dev_get_plat(dev);
struct dm_test_priv *priv = dev_get_priv(dev);
*pingret = pingval + pdata->ping_add;
static int testfdt_ofdata_to_platdata(struct udevice *dev)
{
- struct dm_test_pdata *pdata = dev_get_platdata(dev);
+ struct dm_test_pdata *pdata = dev_get_plat(dev);
pdata->ping_add = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"ping-add", -1);
static int testprobe_drv_probe(struct udevice *dev)
{
- struct dm_testprobe_pdata *pdata = dev_get_platdata(dev);
+ struct dm_testprobe_pdata *pdata = dev_get_plat(dev);
return pdata->probe_err;
}
static int testdevres_drv_bind(struct udevice *dev)
{
- struct dm_testdevres_pdata *pdata = dev_get_platdata(dev);
+ struct dm_testdevres_pdata *pdata = dev_get_plat(dev);
pdata->ptr = devm_kmalloc(dev, TEST_DEVRES_SIZE, 0);
/* Remove them and try again, with an error on the second one */
ut_assertok(uclass_get_device(UCLASS_TEST_PROBE, 1, &dev));
- pdata = dev_get_platdata(dev);
+ pdata = dev_get_plat(dev);
pdata->probe_err = -ENOMEM;
device_remove(parent, DM_REMOVE_NORMAL);
ut_assertok(uclass_first_device(UCLASS_TEST_PROBE, &dev));
/* Now an error on the first one */
ut_assertok(uclass_get_device(UCLASS_TEST_PROBE, 0, &dev));
- pdata = dev_get_platdata(dev);
+ pdata = dev_get_plat(dev);
pdata->probe_err = -ENOENT;
device_remove(parent, DM_REMOVE_NORMAL);
ut_asserteq(-ENOENT, uclass_first_device(UCLASS_TEST_PROBE, &dev));
ut_assertok(check_devices(uts, devlist, 0));
/* Remove them and try again, with an error on the second one */
- pdata = dev_get_platdata(devlist[1]);
+ pdata = dev_get_plat(devlist[1]);
pdata->probe_err = -ENOENT - 1;
device_remove(parent, DM_REMOVE_NORMAL);
ut_assertok(check_devices(uts, devlist, 1 << 1));
/* Now an error on the first one */
- pdata = dev_get_platdata(devlist[0]);
+ pdata = dev_get_plat(devlist[0]);
pdata->probe_err = -ENOENT - 0;
device_remove(parent, DM_REMOVE_NORMAL);
ut_assertok(check_devices(uts, devlist, 3 << 0));
/* Now errors on all */
- pdata = dev_get_platdata(devlist[2]);
+ pdata = dev_get_plat(devlist[2]);
pdata->probe_err = -ENOENT - 2;
- pdata = dev_get_platdata(devlist[3]);
+ pdata = dev_get_plat(devlist[3]);
pdata->probe_err = -ENOENT - 3;
device_remove(parent, DM_REMOVE_NORMAL);
ut_assertok(check_devices(uts, devlist, 0xf << 0));
ut_assertok(uclass_find_device(UCLASS_VIDEO, 0, &dev));
ut_assert(!device_active(dev));
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
plat->vidconsole_drv_name = "vidconsole0";
return 0;
ut_assertok(uclass_find_device(UCLASS_VIDEO, 0, &dev));
ut_assert(!device_active(dev));
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
plat->rot = rot;
ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev));
ut_assertok(uclass_find_device(UCLASS_VIDEO, 0, &dev));
ut_assert(!device_active(dev));
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
plat->font_size = 100;
ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev));
ut_assertok(uclass_find_device(UCLASS_VIDEO, 0, &dev));
ut_assert(!device_active(dev));
- plat = dev_get_platdata(dev);
+ plat = dev_get_plat(dev);
plat->font_size = 100;
ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev));
projects / u-boot.git / commitdiff
