riscv: Fix detecting FPU support in standard extension

We should check the string until it hits underscore, in case it
searches multi-letter extensions. For example, "rv64imac_xandes"
will be treated as D extension support since there is a "d" in
"andes", resulting illegal instruction caused by initializing FCSR.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 52ab02519f8bf5659e79eb9447c5f330a7ca3e1f..d34c8efce0938b759a90b350dd2ad7e7c056ad7b 100644 (file)
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -36,6 +36,7 @@ static inline bool supports_extension(char ext)
 #ifdef CONFIG_CPU
        struct udevice *dev;
        char desc[32];
+       int i;
 
        uclass_find_first_device(UCLASS_CPU, &dev);
        if (!dev) {
@@ -43,9 +44,16 @@ static inline bool supports_extension(char ext)
                return false;
        }
        if (!cpu_get_desc(dev, desc, sizeof(desc))) {
-               /* skip the first 4 characters (rv32|rv64) */
-               if (strchr(desc + 4, ext))
-                       return true;
+               /*
+                * skip the first 4 characters (rv32|rv64) and
+                * check until underscore
+                */
+               for (i = 4; i < sizeof(desc); i++) {
+                       if (desc[i] == '_' || desc[i] == '\0')
+                               break;
+                       if (desc[i] == ext)
+                               return true;
+               }
        }
 
        return false;