]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Convert CONFIG_SYS_SPD_BUS_NUM to Kconfig
authorTom Rini <trini@konsulko.com>
Wed, 15 Jun 2022 16:03:54 +0000 (12:03 -0400)
committerTom Rini <trini@konsulko.com>
Tue, 5 Jul 2022 21:03:01 +0000 (17:03 -0400)
This converts the following to Kconfig:
   CONFIG_SYS_SPD_BUS_NUM

Signed-off-by: Tom Rini <trini@konsulko.com>
75 files changed:
README
configs/P1010RDB-PA_36BIT_NAND_defconfig
configs/P1010RDB-PA_36BIT_NOR_defconfig
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PA_NAND_defconfig
configs/P1010RDB-PA_NOR_defconfig
configs/P1010RDB-PA_SDCARD_defconfig
configs/P1010RDB-PA_SPIFLASH_defconfig
configs/P1010RDB-PB_36BIT_NAND_defconfig
configs/P1010RDB-PB_36BIT_NOR_defconfig
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PB_NAND_defconfig
configs/P1010RDB-PB_NOR_defconfig
configs/P1010RDB-PB_SDCARD_defconfig
configs/P1010RDB-PB_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_NAND_defconfig
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_defconfig
configs/P1020RDB-PC_NAND_defconfig
configs/P1020RDB-PC_SDCARD_defconfig
configs/P1020RDB-PC_SPIFLASH_defconfig
configs/P1020RDB-PC_defconfig
configs/P1020RDB-PD_NAND_defconfig
configs/P1020RDB-PD_SDCARD_defconfig
configs/P1020RDB-PD_SPIFLASH_defconfig
configs/P1020RDB-PD_defconfig
configs/P2020RDB-PC_36BIT_NAND_defconfig
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P2020RDB-PC_36BIT_defconfig
configs/P2020RDB-PC_NAND_defconfig
configs/P2020RDB-PC_SDCARD_defconfig
configs/P2020RDB-PC_SPIFLASH_defconfig
configs/P2020RDB-PC_defconfig
configs/P3041DS_NAND_defconfig
configs/P3041DS_SDCARD_defconfig
configs/P3041DS_SPIFLASH_defconfig
configs/P3041DS_defconfig
configs/P4080DS_SDCARD_defconfig
configs/P4080DS_SPIFLASH_defconfig
configs/P4080DS_defconfig
configs/P5040DS_NAND_defconfig
configs/P5040DS_SDCARD_defconfig
configs/P5040DS_SPIFLASH_defconfig
configs/P5040DS_defconfig
drivers/ddr/Kconfig
include/configs/MPC8548CDS.h
include/configs/P1010RDB.h
include/configs/P2041RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/corenet_ds.h
include/configs/km/pg-wcom-ls102xa.h
include/configs/kmcent2.h
include/configs/ls1021aqds.h
include/configs/ls1043aqds.h
include/configs/ls1043ardb.h
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
include/configs/ls1088aqds.h
include/configs/ls1088ardb.h
include/configs/ls2080aqds.h
include/configs/ls2080ardb.h
include/configs/lx2160a_common.h
include/configs/novena.h
include/configs/p1_p2_rdb_pc.h
include/configs/socrates.h
include/configs/vf610twr.h
include/i2c.h

diff --git a/README b/README
index 0cf1c4991a4c1a21a12230bedd40fa3c813f1151..c3308ec4d91d597423e8bbc2fcabe83532776539 100644 (file)
--- a/README
+++ b/README
@@ -1302,11 +1302,6 @@ The following options need to be configured:
 
                will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
 
-               CONFIG_SYS_SPD_BUS_NUM
-
-               If defined, then this indicates the I2C bus number for DDR SPD.
-               If not defined, then U-Boot assumes that SPD is on I2C bus 0.
-
                CONFIG_SYS_RTC_BUS_NUM
 
                If defined, then this indicates the I2C bus number for the RTC.
index dfedc1f35ab08e7df8707e76c32ed030c36df74b..a57da3e22ac064e3954bcf80d488d0c800a1dcf0 100644 (file)
@@ -80,6 +80,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_TPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index fb71365692c18b5f1a394859570da02ea5af5b8c..14f322f58fc9b891ae68005e4f4b229d10e0ac31 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_COMMON_INIT_DDR=y
 CONFIG_SPL_COMMON_INIT_DDR=y
index 36231901347860e1c63e621da2a082ad52897bc2..ba9c8a05092a4fa91619f9c5059f8434633bb85c 100644 (file)
@@ -69,6 +69,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index ad30bbb3fc21c1af0d66a825d63e7e0e5e343f17..5948f699bc2f3e2c62b73b89d495fe8241b8bf47 100644 (file)
@@ -72,6 +72,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 3e52bba8f53becc86550d2208a3c4b173b4a8a7f..ef7cc29b13003c389cc86fc88c3b851b44d97165 100644 (file)
@@ -79,6 +79,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_TPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 6770981aba8afe1f6e376083846c908a40395b05..2fe5b61d2cd0d531829a3f77f40d2ace52308b84 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_COMMON_INIT_DDR=y
 CONFIG_SPL_COMMON_INIT_DDR=y
index c7b6008baac6985f43bbbf59f3d113a5f197ba87..573f799f5d7c0da6fd8454c36dec522f6660529d 100644 (file)
@@ -68,6 +68,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 68c7bccae62cd5402be394c7c5c65fcba9942488..086c34d01619a66f6b7145239776c8518c52d61c 100644 (file)
@@ -71,6 +71,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 84e8f65bd00e06c402532b34b6049222e057f4e5..850a9746d84b341e537227d1dfd3886ac27c1157 100644 (file)
@@ -81,6 +81,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_TPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 427073a8614576cf11969f408fad6621d3bc35e0..9ae73502c4ff646a6b4834e74d65e1af6b9e7848 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_COMMON_INIT_DDR=y
 CONFIG_SPL_COMMON_INIT_DDR=y
index 81231e10ba3368973f5be9cf8e15d7b1cb622be8..e26ffa2ae4e6212cce948d059c3e5a3d31b315cb 100644 (file)
@@ -70,6 +70,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 9313a5281e71b909d923987eeff5c4a5c1160f6d..1f3adaa5b2aa946cbec1867aed9d1e8fbbdf750e 100644 (file)
@@ -73,6 +73,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 2534a2e4900d4856dc327e71dfc059262acd90fe..b5d00173725d76870a931999e162791873ee104e 100644 (file)
@@ -80,6 +80,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_TPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 44f91fbf942f223beaf9cee251f66bd928307a35..5118e83b6e03cba480a16e21c568761ac88dffff 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_COMMON_INIT_DDR=y
 CONFIG_SPL_COMMON_INIT_DDR=y
index dba240c9d4f1cdeef87e4f3b599a448db3a442d0..1c8ebac4969e2c132237d5e9623097a98a20eaa5 100644 (file)
@@ -69,6 +69,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 800d094d21bfea03f4f46e707e6fb90f40f12135..8354163bdec82f4f14f4f4195eafdf517f457ca1 100644 (file)
@@ -72,6 +72,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
index 7d695afce36dff9165ab5cfde3ef6041e44a8359..4def5dc496e0c43b6e00d0916701ef52a23fd0df 100644 (file)
@@ -78,6 +78,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
index 11894a149cb55bc51200322549056a3722ffbc77..87f4bf2c50c349d5bceb8ec0575fca77696aa598 100644 (file)
@@ -68,6 +68,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index 86f41ca5e76933020909980d085747008bf45baf..f5332eabc88303c3b2fa54e70c711bef6636c1b1 100644 (file)
@@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index de5b326f850ba8ea23e4155050616a30526e2593..d6af6a82988b811b9ac91673af783da1ea56b3b2 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index 54b78e8e182ad4541806e76620f96c166a7704e3..2301d62d1784b2605308a582efa4a35a091b2d56 100644 (file)
@@ -77,6 +77,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
index 70a7569ed59a744f95e1147d802a45463eb4f698..87fb78c18216a70c8bed509e9ac26d80db885f65 100644 (file)
@@ -67,6 +67,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index 5c58c4a74c23d6624be7144f41725a45c7ab3f65..65de103a527223414c16424a69a558c7224fdbb2 100644 (file)
@@ -70,6 +70,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index 247d28af7953dfc83156034300f029ff25f4d625..4c3751e66eb9e2bd22168e3244e5a085c550bf52 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index fb5d582e4d10edaa13d9e8a057990fd5b32db40e..9164276f9460c1277a772eb1a397b531a9664e20 100644 (file)
@@ -80,6 +80,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
index 98661bf3143656a0a2124e3279d482cfc2fc27a0..74d1235375b80292bb1c7065412cefe7044fba20 100644 (file)
@@ -70,6 +70,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
index b25b8da7c4f4a6f52a4bf01749b910b7ebd0b7d6..11c9e11aae9ce3198d8cdcce5500eba7dc7387e0 100644 (file)
@@ -73,6 +73,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
index 92ae6347f16f768ff73d5291bcd292640ef89e28..d38c3e00e26acfe88cbbdf3ed5a037ca40cfc566 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
index 00d5afa0bfe2a2a9e8a7551f77650d96a32e7d5f..459da473f6407b5b5b25852447672d3fe8ca4560 100644 (file)
@@ -82,6 +82,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
index 3cc100a28c6e1b34030450b3d9319626aa591fa7..3bc28d9d345b8ccf8630dbfb3caf5b09b96bb1ca 100644 (file)
@@ -72,6 +72,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index 0a61313e0b8c4d14e8b0c328eafc0ec2abc56257..6158455af35710033783571afc5dc5ebb70d5ac5 100644 (file)
@@ -75,6 +75,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index 8804c7bff5f0f31efd095ff3070d716e27f3a6a1..8b521341625ab588646f73f540338bfa4ee1ea79 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index 9a423882943abb4e4859cdb48c4aed41d8ee090e..117382fe88e086e6df8f718daf06928b4a9a4712 100644 (file)
@@ -81,6 +81,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
index 1cd2da10170e5bcd3132620cf61852876ef2b790..9c101e973741f3c232625048d996f392fe2707ab 100644 (file)
@@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index 361b43645e68ac577024b8c0cdf7baa8278e7f82..4216eecf269bf3a86dd39a960d98950549d91e72 100644 (file)
@@ -74,6 +74,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index b070cb0843cc2d74cfef8b52e807b4dba11b9f11..e15213a9cb330759ed4c41b3a70289bc6c673607 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
index 6da4e06ff90a0ee32a206021ca4a7c3d5fdc0be6..9cf139f561c5ef066910ebc7f34b92145ada3891 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index 828896290e7fd48c71ed5b8e237d9e67350230e1..223cd178111d4bd400318ac5672b5620d42f3361 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index ea2e1ebe9a1239fe67065bdaf23a60188b77ee2d..ed0f7a1f295c3dac7cc5344839a2128e7521df93 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index 627795235b1ce70a599a5a275600bdeb8a8240c0..0a3937acca5ed18bb3838ad1198a91ba3eb9d2e4 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index 867f8aace4c641640e1f5cf11f7cb8cf7b7e5da2..e87d506e1b55f71c6f150eaf912459ec17659414 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index 59984c916bced3c9fa93cbeac66fae22a7a820ca..4b17f3614da00c31197afbc88ca9f8372dca47fe 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index 2733bb2cad98b7c0c9528ac30584555b57b9e8f0..5d6ffc5d1a319eb4fc310825fcabb67b215e7b13 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index e7f9755efb877f4675535e0c7f61c06079b9ae8d..dafb3ac2a0d5c8286206fab36b75e9c44098366d 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index 32c1065c879c8dbe307415f6dd5ecd0d772c27fd..083b2b39da66def7392a0da5be420a5a47d9ad7e 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index 054f43e4c369eb36a93891728fdebcd9becd44e4..270c5545c05bac0476b609ed7bb0b0c26db8052e 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index 44abf8ff10636285407550d05469f0520d131b28..6ae3f7b522d85d6a4aa78c31027ed9231551c4ed 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
index eec9d480b096ad265c8aa74016ea8b58d3f1dcd3..738b7884012f3fbfdd6d24b96f7e69da4ef5937f 100644 (file)
@@ -30,5 +30,10 @@ config DDR_SPD
          For memory controllers that can utilize it, add enable support for
          using the JEDEC SDP standard.
 
+config SYS_SPD_BUS_NUM
+       int "I2C bus number for DDR SPD"
+       depends on DDR_SPD || SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY
+       default 0
+
 source "drivers/ddr/altera/Kconfig"
 source "drivers/ddr/imx/Kconfig"
index 5fba5bb198dd666e9d9dd3017902343bba94a601..ce559e907c0550eb723d24b36cca4226ba367775 100644 (file)
  */
 #if !CONFIG_IS_ENABLED(DM_I2C)
 #define CONFIG_SYS_I2C_NOPROBES                { {0, 0x69} }
-#else
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #endif
 
 /* EEPROM */
index 53c719807d6c4c827a3da70944d8e1ef22a737bc..94fa3174de305770a58e1c902a4c1204120caab0 100644 (file)
 
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_SYS_SPD_BUS_NUM         1
 #define SPD_EEPROM_ADDRESS             0x52
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
index 8e5d18f6cca41cbdd25bc5d1789c93f0afae3d1c..4e96d2a06b7934ecf745d25027b2ccde47087e74 100644 (file)
@@ -89,7 +89,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x52
 #define CONFIG_SYS_SDRAM_SIZE  4096    /* for fixed parameter use */
 
index 3f32354038e34720fcec0129ed6527064f9acdd9..9d68f2568df4d1c578dcf6c362a621e6f42031b4 100644 (file)
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51
 #define CONFIG_SYS_SDRAM_SIZE  4096    /* for fixed parameter use */
 #elif defined(CONFIG_TARGET_T1023RDB)
index bda252486213bc78acbee5182bdf0ad85f7dce71..f1738b32c5d624088339dd0238b48b01acc91673 100644 (file)
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51
 
 #define CONFIG_SYS_SDRAM_SIZE  4096    /* for fixed parameter use */
index 0c13550ef234e4398bba2926b164bdd800fcffee..eda03dad229aad53d1c3e7e04a72d7275b430979 100644 (file)
@@ -95,7 +95,6 @@
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51
 #define SPD_EEPROM_ADDRESS2    0x52
index 5fb768ab92fcc275e2e35e40acd51fd3c3cd2e04..290fd7cf744eda4aa4706b9aade04e801157ae75 100644 (file)
@@ -90,7 +90,6 @@
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51
 #define SPD_EEPROM_ADDRESS2    0x52
index 6f5b75942993842ec884cb6fbf33c9702417cd19..29447e4895ab281d2e7d06b8c2bbfe5a3b1065a4 100644 (file)
 /*
  * DDR Setup
  */
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS1    0x52
 #define SPD_EEPROM_ADDRESS2    0x54
 #define SPD_EEPROM_ADDRESS3    0x56
index 034cd00381ef18c562314ed40f82087b157eb5cd..51bc772e23867e2dd34c2424ac68b24e7b0e1f52 100644 (file)
@@ -92,7 +92,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS1    0x51
 #define SPD_EEPROM_ADDRESS2    0x52
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1     /* for p3041/p5010 */
index 7430185666e7e3b7df7e6700cd64a5dd877d353d..3927558467af41c99fcbc9a681c7fee2233bf4c0 100644 (file)
@@ -22,7 +22,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM         0
 #define SPD_EEPROM_ADDRESS             0x54
 
 /* POST memory regions test */
index 798688a220ba32088249fa7e1a4eb58115d80a7c..3b4ddb0f94a5e134d2e0521703b22894686d8e18 100644 (file)
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x54
 #define CONFIG_SYS_SDRAM_SIZE  4096    /* for fixed parameter use */
 
index e17bdcad6d04847a666b36dc16f12daeffb7f973..dd389a9e16e88033e3532176cee932c54447d930 100644 (file)
@@ -23,7 +23,6 @@
 #endif
 
 #define SPD_EEPROM_ADDRESS             0x51
-#define CONFIG_SYS_SPD_BUS_NUM         0
 
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
index 75d655c50d66672d1a104f1e5ddf487a6551eaa1..e81384ab3f007bb3d5247622290c62ce53ae92d7 100644 (file)
@@ -13,7 +13,6 @@
 /* Physical Memory Map */
 
 #define SPD_EEPROM_ADDRESS             0x51
-#define CONFIG_SYS_SPD_BUS_NUM         0
 
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
index edb4e64ee41ab415e8f0d0f5bf6bda63be7e04cc..f39a940655698dff187b661cb66489dac13da356 100644 (file)
@@ -12,8 +12,6 @@
 
 /* Physical Memory Map */
 
-#define CONFIG_SYS_SPD_BUS_NUM         0
-
 #ifndef CONFIG_SPL
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
index 6271135db9fc40b1cc1dd3e8042c0d0759f906df..0e24209fbe9e478282dd3192d72fd797b071b495 100644 (file)
@@ -13,7 +13,6 @@
 /* Physical Memory Map */
 
 #define SPD_EEPROM_ADDRESS             0x51
-#define CONFIG_SYS_SPD_BUS_NUM         0
 
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
index 4ad62b43f8c962955aad99eae9192449d44a2324..fdd251abcd1ad0ae418a72537a991d9bb1d7bf73 100644 (file)
@@ -14,7 +14,6 @@
 /* Physical Memory Map */
 
 #define SPD_EEPROM_ADDRESS             0x51
-#define CONFIG_SYS_SPD_BUS_NUM         0
 
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 
index e532c343f48b1ef94ddadd3cb431455c2fd68924..7c60f287981aa1f9f411f1b19e467e512ea5c017 100644 (file)
@@ -16,7 +16,6 @@
 
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #define SPD_EEPROM_ADDRESS             0x51
-#define CONFIG_SYS_SPD_BUS_NUM         0
 
 
 /*
index aeadf534bc32e6be010a95094650536e6b6180dc..c0567c3fe580a9e8e54970316a046521b638f144 100644 (file)
@@ -17,7 +17,6 @@
 
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #define SPD_EEPROM_ADDRESS     0x51
-#define CONFIG_SYS_SPD_BUS_NUM 0       /* SPD on I2C bus 0 */
 
 
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
index 96da4ab2ec084bcd113896a897f222ea877c6e15..a0e2127f1dddf44bcfcdf762bb34afa4e92a665c 100644 (file)
@@ -24,7 +24,6 @@
 #define SPD_EEPROM_ADDRESS5    0x55
 #define SPD_EEPROM_ADDRESS6    0x56    /* dummy address */
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1
-#define CONFIG_SYS_SPD_BUS_NUM 0       /* SPD on I2C bus 0 */
 
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
 #define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128*1024*1024)
index 835fff4bc60b19a551a497ccc084e83f12f4b919..9c4d2feb7883f4a5afb90bc19cadb1a51be74fdb 100644 (file)
@@ -29,7 +29,6 @@
 #define SPD_EEPROM_ADDRESS5    0x55
 #define SPD_EEPROM_ADDRESS6    0x56    /* dummy address */
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1
-#define CONFIG_SYS_SPD_BUS_NUM 0       /* SPD on I2C bus 0 */
 
 #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
 
index 1669ecd2aba9e9f3695db3f7bafff900c480c7e9..bc3a0046ac637fced765d6b9bc4c909282c973d3 100644 (file)
@@ -31,7 +31,6 @@
 #define SPD_EEPROM_ADDRESS5            0x55
 #define SPD_EEPROM_ADDRESS6            0x56
 #define SPD_EEPROM_ADDRESS             SPD_EEPROM_ADDRESS1
-#define CONFIG_SYS_SPD_BUS_NUM         0       /* SPD on I2C bus 0 */
 #define CONFIG_SYS_MONITOR_LEN         (936 * 1024)
 
 /* Miscellaneous configurable options */
index ee39b3c297cb791269e2b9d76cddc79c3e630dd1..9f18db465e1099db6b4ccdd67406d448b2a991d2 100644 (file)
@@ -39,7 +39,6 @@
 
 /* I2C */
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_SPD_BUS_NUM         0
 
 /* I2C EEPROM */
 
index 1be548e20d272bcb782775d1aaea4ac96528ac3d..6bc8a6aca031d746efc87cb3b871e613d8dbec15 100644 (file)
 
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS 0x52
 
 #if defined(CONFIG_TARGET_P1020RDB_PD)
 #define CONFIG_SYS_I2C_NOPROBES                { {0, 0x29} }
 #endif
 
-#define CONFIG_SYS_SPD_BUS_NUM         1 /* For rom_loc and flash bank */
-
 /*
  * I2C2 EEPROM
  */
index 73f82fc00aca05f14b96821275f8cf794a84bcd0..14f7bb9f7132817a1877f2ed5e6e824d2a083ff4 100644 (file)
 #define CONFIG_SYS_LIME_BASE           0xc8000000
 #define CONFIG_SYS_LIME_SIZE           0x04000000      /* 64 MB        */
 
-#define CONFIG_SYS_SPD_BUS_NUM 0
-
 /*
  * General PCI
  * Memory space is mapped 1-1.
index 7f4bfb5124ace6cb7ed9f01b35635d933a804477..32d9df0a00ce5dc6b1d5e22b55c0c9fa11a01cd2 100644 (file)
@@ -26,7 +26,6 @@
 #define CONFIG_FEC_MXC_PHYADDR          0
 
 /* I2C Configs */
-#define CONFIG_SYS_SPD_BUS_NUM         0
 
 /*
  * We do have 128MB of memory on the Vybrid Tower board. Leave the last
index 22add0b5282ff658b0a45acb463f5ebae2265d9b..e0ee94e550467cf716e9e56424fd470898da548f 100644 (file)
@@ -647,9 +647,6 @@ void i2c_early_init_f(void);
 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
 #define CONFIG_SYS_RTC_BUS_NUM         0
 #endif
-#if !defined(CONFIG_SYS_SPD_BUS_NUM)
-#define CONFIG_SYS_SPD_BUS_NUM         0
-#endif
 
 struct i2c_adapter {
        void            (*init)(struct i2c_adapter *adap, int speed,