arm: vf610: add NFC pin mux

Add pin mux for NAND Flash Controller (NFC). NAND can be connected
using 8 or 16 data lines, this patch adds pin mux entries for all
16 data lines.

Signed-off-by: Stefan Agner <stefan@agner.ch>

diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
index a9656416815768f4183e623705da162572054040..7464da80cf1a0d72a3af79fa3c3b1ac699995429 100644 (file)
--- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h
+++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
@@ -19,6 +19,13 @@
 #define VF610_DDR_PAD_CTRL     PAD_CTL_DSE_25ohm
 #define VF610_I2C_PAD_CTRL     (PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_50ohm | \
                                PAD_CTL_SPEED_HIGH | PAD_CTL_OBE_IBE_ENABLE)
+#define VF610_NFC_IO_PAD_CTRL  (PAD_CTL_SPEED_MED | PAD_CTL_SRE | \
+                               PAD_CTL_DSE_50ohm | PAD_CTL_PUS_47K_UP | \
+                               PAD_CTL_OBE_IBE_ENABLE)
+#define VF610_NFC_CN_PAD_CTRL  (PAD_CTL_SPEED_MED | PAD_CTL_SRE | \
+                               PAD_CTL_DSE_25ohm | PAD_CTL_OBE_ENABLE)
+#define VF610_NFC_RB_PAD_CTRL  (PAD_CTL_SPEED_MED | PAD_CTL_SRE | \
+                               PAD_CTL_PUS_22K_UP | PAD_CTL_IBE_ENABLE)
 
 #define VF610_QSPI_PAD_CTRL    (PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_150ohm | \
                                PAD_CTL_PUS_22K_UP | PAD_CTL_OBE_IBE_ENABLE)
@@ -56,6 +63,15 @@ enum {
        VF610_PAD_PTA29__ESDHC1_DAT3            = IOMUX_PAD(0x004c, 0x004c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
        VF610_PAD_PTB14__I2C0_SCL               = IOMUX_PAD(0x0090, 0x0090, 2, 0x033c, 1, VF610_I2C_PAD_CTRL),
        VF610_PAD_PTB15__I2C0_SDA               = IOMUX_PAD(0x0094, 0x0094, 2, 0x0340, 1, VF610_I2C_PAD_CTRL),
+       VF610_PAD_PTD31__NF_IO15                = IOMUX_PAD(0x00fc, 0x00fc, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD30__NF_IO14                = IOMUX_PAD(0x0100, 0x0100, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD29__NF_IO13                = IOMUX_PAD(0x0104, 0x0104, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD28__NF_IO12                = IOMUX_PAD(0x0108, 0x0108, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD27__NF_IO11                = IOMUX_PAD(0x010c, 0x010c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD26__NF_IO10                = IOMUX_PAD(0x0110, 0x0110, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD25__NF_IO9                 = IOMUX_PAD(0x0114, 0x0114, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD24__NF_IO8                 = IOMUX_PAD(0x0118, 0x0118, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD23__NF_IO7                 = IOMUX_PAD(0x011c, 0x011c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
        VF610_PAD_PTD0__QSPI0_A_QSCK            = IOMUX_PAD(0x013c, 0x013c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
        VF610_PAD_PTD1__QSPI0_A_CS0             = IOMUX_PAD(0x0140, 0x0140, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
        VF610_PAD_PTD2__QSPI0_A_DATA3           = IOMUX_PAD(0x0144, 0x0144, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
@@ -68,6 +84,24 @@ enum {
        VF610_PAD_PTD10__QSPI0_B_DATA2          = IOMUX_PAD(0x0164, 0x0164, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
        VF610_PAD_PTD11__QSPI0_B_DATA1          = IOMUX_PAD(0x0168, 0x0168, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
        VF610_PAD_PTD12__QSPI0_B_DATA0          = IOMUX_PAD(0x016c, 0x016c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+       VF610_PAD_PTD22__NF_IO6                 = IOMUX_PAD(0x0120, 0x0120, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD21__NF_IO5                 = IOMUX_PAD(0x0124, 0x0124, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), 
+       VF610_PAD_PTD20__NF_IO4                 = IOMUX_PAD(0x0128, 0x0128, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), 
+       VF610_PAD_PTD19__NF_IO3                 = IOMUX_PAD(0x012c, 0x012c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD18__NF_IO2                 = IOMUX_PAD(0x0130, 0x0130, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), 
+       VF610_PAD_PTD17__NF_IO1                 = IOMUX_PAD(0x0134, 0x0134, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD16__NF_IO0                 = IOMUX_PAD(0x0138, 0x0138, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTB24__NF_WE_B                = IOMUX_PAD(0x0178, 0x0178, 5, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+       VF610_PAD_PTB25__NF_CE0_B               = IOMUX_PAD(0x017c, 0x017c, 5, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+
+       VF610_PAD_PTB27__NF_RE_B                = IOMUX_PAD(0x0184, 0x0184, 6, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+
+       VF610_PAD_PTC26__NF_RB_B                = IOMUX_PAD(0x018C, 0x018C, 5, __NA_, 0, VF610_NFC_RB_PAD_CTRL),
+
+       VF610_PAD_PTC27__NF_ALE                 = IOMUX_PAD(0x0190, 0x0190, 6, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+
+       VF610_PAD_PTC28__NF_CLE                 = IOMUX_PAD(0x0194, 0x0194, 6, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+
        VF610_PAD_DDR_A15__DDR_A_15             = IOMUX_PAD(0x0220, 0x0220, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
        VF610_PAD_DDR_A14__DDR_A_14             = IOMUX_PAD(0x0224, 0x0224, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
        VF610_PAD_DDR_A13__DDR_A_13             = IOMUX_PAD(0x0228, 0x0228, 0, __NA_, 0, VF610_DDR_PAD_CTRL),

diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h
index e91d4acb1872f976aa5441ae1c19ef03897810ca..70ee86c4321e77988ee60ec7b46362c264aa8d9b 100644 (file)
--- a/arch/arm/include/asm/imx-common/iomux-v3.h
+++ b/arch/arm/include/asm/imx-common/iomux-v3.h
@@ -123,6 +123,8 @@ typedef u64 iomux_v3_cfg_t;
 #define PAD_CTL_SPEED_MED      (1 << 12)
 #define PAD_CTL_SPEED_HIGH     (3 << 12)
 
+#define PAD_CTL_SRE            (1 << 11)
+
 #define PAD_CTL_DSE_150ohm     (1 << 6)
 #define PAD_CTL_DSE_50ohm      (3 << 6)
 #define PAD_CTL_DSE_25ohm      (6 << 6)
@@ -135,6 +137,8 @@ typedef u64 iomux_v3_cfg_t;
 #define PAD_CTL_PUE            (1 << 2 | PAD_CTL_PKE)
 
 #define PAD_CTL_OBE_IBE_ENABLE (3 << 0)
+#define PAD_CTL_OBE_ENABLE     (1 << 1)
+#define PAD_CTL_IBE_ENABLE     (1 << 0)
 
 #else