ARM: start.S: fix typo

Fix typo in comment about position of 'A' bit in several start.S.

Signed-off-by: Yuichiro Goto <goto.yuichiro@espark.co.jp>

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 1ec79a6f35148417c4cdaf800f5cf319cd106167..3ebdfddc8098a4de195166de4f30c43fdba1f07b 100644 (file)
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -78,7 +78,7 @@ cpu_init_crit:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #0x00002300     @ clear bits 13, 9:8 (--V- --RS)
        bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
-       orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
+       orr     r0, r0, #0x00000002     @ set bit 1 (A) Align
        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
        mcr     p15, 0, r0, c1, c0, 0
 

diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 4c0ab4d0eebce58458ab52a8e10567891b65a761..a602d4e693745e3f1a631010cf87b35babdfe862 100644 (file)
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -78,7 +78,7 @@ cpu_init_crit:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #0x00002300     @ clear bits 13, 9:8 (--V- --RS)
        bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
-       orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
+       orr     r0, r0, #0x00000002     @ set bit 1 (A) Align
        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
 
        /* Prepare to disable the MMU */

diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 07404502c829eb1ad4eb05cb602a41603fa37447..69cabebed91edbba882b5b7821f22aaaa3969bcc 100644 (file)
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -131,7 +131,7 @@ cpu_init_crit:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #0x00002300     @ clear bits 13, 9:8 (--V- --RS)
        bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
-       orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
+       orr     r0, r0, #0x00000002     @ set bit 1 (A) Align
        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
        mcr     p15, 0, r0, c1, c0, 0
 

diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 82cc1c947771e09bdd087250137e4b8884d1a62e..f05113da9df21ff5a28ebc644fc83bf5399f8606 100644 (file)
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -95,7 +95,7 @@ flush_dcache:
 #else
        bic     r0, r0, #0x00002000     /* clear bit 13 (--V- ----) */
 #endif
-       orr     r0, r0, #0x00000002     /* set bit 2 (A) Align */
+       orr     r0, r0, #0x00000002     /* set bit 1 (A) Align */
 #ifndef CONFIG_SYS_ICACHE_OFF
        orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
 #endif

diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index b55395aa53ba100e0c6274e6aa0201fa7575978e..214cd8cbd9070f36feaa046bcd56f163fe245ae7 100644 (file)
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -86,7 +86,7 @@ cpu_init_crit:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #0x00002300     /* clear bits 13, 9:8 (--V- --RS) */
        bic     r0, r0, #0x00000087     /* clear bits 7, 2:0 (B--- -CAM) */
-       orr     r0, r0, #0x00000002     /* set bit 2 (A) Align */
+       orr     r0, r0, #0x00000002     /* set bit 1 (A) Align */
        orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
        mcr     p15, 0, r0, c1, c0, 0
 

diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 879390be2ddebca91de05e86f88e3f88605e1d22..24b6ad187ae75aa377a5a7c1b75472dd51113579 100644 (file)
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -100,7 +100,7 @@ cpu_init_crit:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #0x00003300     @ clear bits 13:12, 9:8 (--VI --RS)
        bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
-       orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
+       orr     r0, r0, #0x00000002     @ set bit 1 (A) Align
        mcr     p15, 0, r0, c1, c0, 0
 
        mov     pc, lr          /* back to my caller */

diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index eebff661f8d20d6ec4a6d22d450fab13102f81e0..408b70dbc1fe2f336173c9933120b4d9a1be560b 100644 (file)
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -112,7 +112,7 @@ cpu_init_crit:
        bic     r0, r0, #0x00002000     @ clear bit 13 (X)
        bic     r0, r0, #0x0000000f     @ clear bits 3-0 (WCAM)
        orr     r0, r0, #0x00001000     @ set bit 12 (I) Icache
-       orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
+       orr     r0, r0, #0x00000002     @ set bit 1 (A) Align
        mcr     p15,0,r0,c1,c0
 
        /*