CLK: HSDK: Check for PLL bypass firstly

Pll bypass has priority over enable/disable.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index 56ef08c032b99b500aa629b065b1df012bf09820..69e6b24b66c884cb6b71f9b2c2ec87c4eb74d871 100644 (file)
--- a/drivers/clk/clk-hsdk-cgu.c
+++ b/drivers/clk/clk-hsdk-cgu.c
@@ -377,14 +377,14 @@ static ulong pll_get(struct clk *sclk)
 
        pr_debug("current configurarion: %#x\n", val);
 
-       /* Check if PLL is disabled */
-       if (val & CGU_PLL_CTRL_PD)
-               return 0;
-
        /* Check if PLL is bypassed */
        if (val & CGU_PLL_CTRL_BYPASS)
                return PARENT_RATE;
 
+       /* Check if PLL is disabled */
+       if (val & CGU_PLL_CTRL_PD)
+               return 0;
+
        /* input divider = reg.idiv + 1 */
        idiv = 1 + ((val & CGU_PLL_CTRL_IDIV_MASK) >> CGU_PLL_CTRL_IDIV_SHIFT);
        /* fb divider = 2*(reg.fbdiv + 1) */