Tegra114: fdt: Update DT files with I2C info for T114/Dalmore

T114, like T30, does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
I2C5 is used to designate the controller intended for power
control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
index d06cd126dd8cecfdc84e7c7024b2d89b9e469a04..0655b4d52399fdf0bb16cd62b9eb254cec428b75 100644 (file)
--- a/arch/arm/dts/tegra114.dtsi
+++ b/arch/arm/dts/tegra114.dtsi
@@ -2,4 +2,68 @@
 
 / {
        compatible = "nvidia,tegra114";
+
+       aliases {
+               i2c0 = "/i2c@7000d000";
+               i2c1 = "/i2c@7000c000";
+               i2c2 = "/i2c@7000c400";
+               i2c3 = "/i2c@7000c500";
+               i2c4 = "/i2c@7000c700";
+       };
+
+       tegra_car: clock@60006000 {
+               compatible = "nvidia,tegra114-car";
+               reg = <0x60006000 0x1000>;
+               #clock-cells = <1>;
+       };
+
+       i2c@7000c000 {
+               compatible = "nvidia,tegra114-i2c";
+               reg = <0x7000c000 0x100>;
+               interrupts = <0 38 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 12>;
+               status = "disabled";
+       };
+
+       i2c@7000c400 {
+               compatible = "nvidia,tegra114-i2c";
+               reg = <0x7000c400 0x100>;
+               interrupts = <0 84 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 54>;
+               status = "disabled";
+       };
+
+       i2c@7000c500 {
+               compatible = "nvidia,tegra114-i2c";
+               reg = <0x7000c500 0x100>;
+               interrupts = <0 92 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 67>;
+               status = "disabled";
+       };
+
+       i2c@7000c700 {
+               compatible = "nvidia,tegra114-i2c";
+               reg = <0x7000c700 0x100>;
+               interrupts = <0 120 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 103>;
+               status = "disabled";
+       };
+
+       i2c@7000d000 {
+               compatible = "nvidia,tegra114-i2c";
+               reg = <0x7000d000 0x100>;
+               interrupts = <0 53 0x04>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 47>;
+               status = "disabled";
+       };
 };

diff --git a/board/nvidia/dts/tegra114-dalmore.dts b/board/nvidia/dts/tegra114-dalmore.dts
index 731557798e74ebf7b62cf6fb8d6e74ffaaf4eece..ed3c2fde286c89b708992a4fc6837c37e73a7fc5 100644 (file)
--- a/board/nvidia/dts/tegra114-dalmore.dts
+++ b/board/nvidia/dts/tegra114-dalmore.dts
@@ -10,4 +10,29 @@
                device_type = "memory";
                reg = <0x80000000 0x80000000>;
        };
+
+       i2c@7000c000 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000c400 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000c500 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000c700 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000d000 {
+               status = "okay";
+               clock-frequency = <400000>;
+       };
 };