stm32f7: clk: remove usart1 clock enable from board init

Before clock driver availability it was required to enable usart1 clock
for serial init but now with clock driver is taking care of usart1 clock.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>

diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 72212f4912667cfc1cbe302f665d9f843bc5208b..ee1deb52753e20e966db20f211a499e1f945979b 100644 (file)
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -380,7 +380,6 @@ int board_early_init_f(void)
        int res;
 
        res = uart_setup_gpio();
-       clock_setup(USART1_CLOCK_CFG);
        if (res)
                return res;
 

diff --git a/drivers/clk/clk_stm32f7.c b/drivers/clk/clk_stm32f7.c
index 4c5388adabde8c803a4cab972b3ddb4307ee68c5..0d86395d4761ce88d1b5a8863badd669641c86c8 100644 (file)
--- a/drivers/clk/clk_stm32f7.c
+++ b/drivers/clk/clk_stm32f7.c
@@ -228,9 +228,6 @@ static int stm32_clk_enable(struct clk *clk)
 void clock_setup(int peripheral)
 {
        switch (peripheral) {
-       case USART1_CLOCK_CFG:
-               setbits_le32(&STM32_RCC->apb2enr, RCC_APB2ENR_USART1EN);
-               break;
        case GPIO_A_CLOCK_CFG:
                setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_A_EN);
                break;